6 files changed, 33 insertions, 17 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 322e9be0083..b809bbc1c6c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5428,6 +5428,10 @@ SDValue DAGCombiner::unfoldMaskedMerge(SDNode *N) {
   if (!TLI.hasAndNot(M))
     return SDValue();
 
+  // If Y is a constant, check that 'andn' works with immediates.
+  if (!TLI.hasAndNot(Y))
+    return SDValue();
+
   SDLoc DL(N);
 
   SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M);
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 128faffd7cd..0c75fd78dd7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4743,6 +4743,9 @@ bool X86TargetLowering::isMaskAndCmp0FoldingBeneficial(
 }
 
 bool X86TargetLowering::hasAndNotCompare(SDValue Y) const {
+  // A mask and compare against constant is ok for an 'andn' too
+  // even though the BMI instruction doesn't have an immediate form.
+
   if (!Subtarget.hasBMI())
     return false;
 
@@ -4754,6 +4757,14 @@ bool X86TargetLowering::hasAndNotCompare(SDValue Y) const {
   return true;
 }
 
+bool X86TargetLowering::hasAndNot(SDValue Y) const {
+  // x86 can't form 'andn' with an immediate.
+  if (isa<ConstantSDNode>(Y))
+    return false;
+
+  return hasAndNotCompare(Y);
+}
+
 MVT X86TargetLowering::hasFastEqualityCompare(unsigned NumBits) const {
   MVT VT = MVT::getIntegerVT(NumBits);
   if (isTypeLegal(VT))
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index e12585ab67e..58d0c9d92af 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -834,6 +834,8 @@ namespace llvm {
 
     bool hasAndNotCompare(SDValue Y) const override;
 
+    bool hasAndNot(SDValue Y) const override;
+
     bool convertSetCCLogicToBitwiseLogic(EVT VT) const override {
       return VT.isScalarInteger();
     }
diff --git a/llvm/test/CodeGen/X86/icmp-opt.ll b/llvm/test/CodeGen/X86/icmp-opt.ll
index 6278fb841f8..b7cc53fcf57 100644
--- a/llvm/test/CodeGen/X86/icmp-opt.ll
+++ b/llvm/test/CodeGen/X86/icmp-opt.ll
@@ -17,9 +17,9 @@ define i32 @t1(i64 %a) {
 ;
 ; CHECK-BMI-LABEL: t1:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    shrq $63, %rdi
-; CHECK-BMI-NEXT:    xorl $1, %edi
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    xorl %eax, %eax
+; CHECK-BMI-NEXT:    testq %rdi, %rdi
+; CHECK-BMI-NEXT:    setns %al
 ; CHECK-BMI-NEXT:    retq
   %cmp = icmp sgt i64 %a, -1
   %conv = zext i1 %cmp to i32
diff --git a/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll b/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
index 1390b9a013d..833ac1dfe2d 100644
--- a/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
+++ b/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
@@ -101,10 +101,10 @@ define i32 @pos_sel_constants(i32 %a) {
 ;
 ; CHECK-BMI-LABEL: pos_sel_constants:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    sarl $31, %edi
-; CHECK-BMI-NEXT:    notl %edi
-; CHECK-BMI-NEXT:    andl $5, %edi
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    xorl %eax, %eax
+; CHECK-BMI-NEXT:    testl %edi, %edi
+; CHECK-BMI-NEXT:    setns %al
+; CHECK-BMI-NEXT:    leal (%rax,%rax,4), %eax
 ; CHECK-BMI-NEXT:    retq
   %tmp.1 = icmp sgt i32 %a, -1
   %retval = select i1 %tmp.1, i32 5, i32 0
@@ -124,10 +124,10 @@ define i32 @pos_sel_special_constant(i32 %a) {
 ;
 ; CHECK-BMI-LABEL: pos_sel_special_constant:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    shrl $22, %edi
-; CHECK-BMI-NEXT:    notl %edi
-; CHECK-BMI-NEXT:    andl $512, %edi # imm = 0x200
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    xorl %eax, %eax
+; CHECK-BMI-NEXT:    testl %edi, %edi
+; CHECK-BMI-NEXT:    setns %al
+; CHECK-BMI-NEXT:    shll $9, %eax
 ; CHECK-BMI-NEXT:    retq
   %tmp.1 = icmp sgt i32 %a, -1
   %retval = select i1 %tmp.1, i32 512, i32 0
diff --git a/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll b/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
index a28a7edf656..d80ebded434 100644
--- a/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
+++ b/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
@@ -657,11 +657,10 @@ define i32 @in_constant_varx_42(i32 %x, i32 %y, i32 %mask) {
 ;
 ; CHECK-BMI-LABEL: in_constant_varx_42:
 ; CHECK-BMI:       # %bb.0:
+; CHECK-BMI-NEXT:    xorl $42, %edi
 ; CHECK-BMI-NEXT:    andl %edx, %edi
-; CHECK-BMI-NEXT:    notl %edx
-; CHECK-BMI-NEXT:    andl $42, %edx
-; CHECK-BMI-NEXT:    orl %edi, %edx
-; CHECK-BMI-NEXT:    movl %edx, %eax
+; CHECK-BMI-NEXT:    xorl $42, %edi
+; CHECK-BMI-NEXT:    movl %edi, %eax
 ; CHECK-BMI-NEXT:    retq
   %n0 = xor i32 %x, 42 ; %x
   %n1 = and i32 %n0, %mask
@@ -705,9 +704,9 @@ define i32 @in_constant_varx_42_invmask(i32 %x, i32 %y, i32 %mask) {
 ;
 ; CHECK-BMI-LABEL: in_constant_varx_42_invmask:
 ; CHECK-BMI:       # %bb.0:
+; CHECK-BMI-NEXT:    xorl $42, %edi
 ; CHECK-BMI-NEXT:    andnl %edi, %edx, %eax
-; CHECK-BMI-NEXT:    andl $42, %edx
-; CHECK-BMI-NEXT:    orl %edx, %eax
+; CHECK-BMI-NEXT:    xorl $42, %eax
 ; CHECK-BMI-NEXT:    retq
   %notmask = xor i32 %mask, -1
   %n0 = xor i32 %x, 42 ; %x