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authorColin LeMahieu <colinl@codeaurora.org>2015-11-10 00:22:00 +0000
committerColin LeMahieu <colinl@codeaurora.org>2015-11-10 00:22:00 +0000
commitb7a5f9fc29b439d9f26a140d99ca248097e26311 (patch)
tree2793d8d806ac4058464b74214ebb25dafb9ce1a7 /llvm/test/CodeGen
parent97e31cdeedea10dbacddb7915a0fbd7baad00f95 (diff)
downloadbcm5719-llvm-b7a5f9fc29b439d9f26a140d99ca248097e26311.tar.gz
bcm5719-llvm-b7a5f9fc29b439d9f26a140d99ca248097e26311.zip
[Hexagon] Fixing store instructions and reenabling a few more tests.
llvm-svn: 252561
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/Hexagon/absimm.ll1
-rw-r--r--llvm/test/CodeGen/Hexagon/zextloadi1.ll1
2 files changed, 0 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Hexagon/absimm.ll b/llvm/test/CodeGen/Hexagon/absimm.ll
index f3f10f2b4f2..e67af5e8fef 100644
--- a/llvm/test/CodeGen/Hexagon/absimm.ll
+++ b/llvm/test/CodeGen/Hexagon/absimm.ll
@@ -1,7 +1,6 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that we generate absolute addressing mode instructions
; with immediate value.
-; XFAIL: *
define i32 @f1(i32 %i) nounwind {
; CHECK: memw(##786432){{ *}}={{ *}}r{{[0-9]+}}
diff --git a/llvm/test/CodeGen/Hexagon/zextloadi1.ll b/llvm/test/CodeGen/Hexagon/zextloadi1.ll
index c6c982750c0..9ce7bea9fce 100644
--- a/llvm/test/CodeGen/Hexagon/zextloadi1.ll
+++ b/llvm/test/CodeGen/Hexagon/zextloadi1.ll
@@ -1,5 +1,4 @@
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
-; XFAIL: *
; CHECK: r{{[0-9]+}} = ##i129_l+16
; CHECK: r{{[0-9]+}} = ##i129_s+16
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