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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-24 16:39:50 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-24 16:39:50 +0000 |
| commit | a6878bdc0fda4f6c915c2426d9bdced8499d1b0c (patch) | |
| tree | c943b0590a3a3a929399e7ec553fd2af33afe501 /llvm/test/CodeGen | |
| parent | b7d75fee74ae1a1576e31811d5f9206bad89e8bc (diff) | |
| download | bcm5719-llvm-a6878bdc0fda4f6c915c2426d9bdced8499d1b0c.tar.gz bcm5719-llvm-a6878bdc0fda4f6c915c2426d9bdced8499d1b0c.zip | |
[X86][SSE] Added PR27854 tests
llvm-svn: 276571
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/buildvec-insertvec.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/buildvec-insertvec.ll b/llvm/test/CodeGen/X86/buildvec-insertvec.ll index 2ee33a1a902..27d71ca9262 100644 --- a/llvm/test/CodeGen/X86/buildvec-insertvec.ll +++ b/llvm/test/CodeGen/X86/buildvec-insertvec.ll @@ -55,3 +55,51 @@ entry: %2 = insertelement <2 x double> %1, double -0.0, i32 1 ret <2 x double> %2 } + +define <4 x float> @test_buildvector_v4f32_register(float %f0, float %f1, float %f2, float %f3) { +; CHECK-LABEL: test_buildvector_v4f32_register: +; CHECK: # BB#0: +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3] +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0] +; CHECK-NEXT: retq + %ins0 = insertelement <4 x float> undef, float %f0, i32 0 + %ins1 = insertelement <4 x float> %ins0, float %f1, i32 1 + %ins2 = insertelement <4 x float> %ins1, float %f2, i32 2 + %ins3 = insertelement <4 x float> %ins2, float %f3, i32 3 + ret <4 x float> %ins3 +} + +define <4 x float> @test_buildvector_v4f32_load(float* %p0, float* %p1, float* %p2, float* %p3) { +; CHECK-LABEL: test_buildvector_v4f32_load: +; CHECK: # BB#0: +; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3] +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3] +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] +; CHECK-NEXT: retq + %f0 = load float, float* %p0, align 4 + %f1 = load float, float* %p1, align 4 + %f2 = load float, float* %p2, align 4 + %f3 = load float, float* %p3, align 4 + %ins0 = insertelement <4 x float> undef, float %f0, i32 0 + %ins1 = insertelement <4 x float> %ins0, float %f1, i32 1 + %ins2 = insertelement <4 x float> %ins1, float %f2, i32 2 + %ins3 = insertelement <4 x float> %ins2, float %f3, i32 3 + ret <4 x float> %ins3 +} + +define <4 x float> @test_buildvector_v4f32_partial_load(float %f0, float %f1, float %f2, float* %p3) { +; CHECK-LABEL: test_buildvector_v4f32_partial_load: +; CHECK: # BB#0: +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3] +; CHECK-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] +; CHECK-NEXT: retq + %f3 = load float, float* %p3, align 4 + %ins0 = insertelement <4 x float> undef, float %f0, i32 0 + %ins1 = insertelement <4 x float> %ins0, float %f1, i32 1 + %ins2 = insertelement <4 x float> %ins1, float %f2, i32 2 + %ins3 = insertelement <4 x float> %ins2, float %f3, i32 3 + ret <4 x float> %ins3 +} |
