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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-24 16:10:21 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-24 16:10:21 +0000 |
| commit | b7d75fee74ae1a1576e31811d5f9206bad89e8bc (patch) | |
| tree | 470cd76fcc7d11be4c9f762839ab19cd2482a7a8 /llvm/test/CodeGen | |
| parent | 381a0ade5a56a341c0b88526acee14946d05febd (diff) | |
| download | bcm5719-llvm-b7d75fee74ae1a1576e31811d5f9206bad89e8bc.tar.gz bcm5719-llvm-b7d75fee74ae1a1576e31811d5f9206bad89e8bc.zip | |
[X86] Add shift double tests for PR14593
llvm-svn: 276570
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/shift-double.ll | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll index 5dcd87bcbc0..46f54b9cd32 100644 --- a/llvm/test/CodeGen/X86/shift-double.ll +++ b/llvm/test/CodeGen/X86/shift-double.ll @@ -145,3 +145,77 @@ define i16 @test7(i16 %A, i16 %B, i8 %C) nounwind { ret i16 %Z } +; Shift i64 integers on 32-bit target by shift value less then 32 (PR14593) + +define i64 @test8(i64 %val, i32 %bits) nounwind { +; CHECK-LABEL: test8: +; CHECK: # BB#0: +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi +; CHECK-NEXT: movb %ch, %cl +; CHECK-NEXT: shll %cl, %esi +; CHECK-NEXT: movl %eax, %edx +; CHECK-NEXT: shrl %edx +; CHECK-NEXT: andb $31, %cl +; CHECK-NEXT: xorb $31, %cl +; CHECK-NEXT: shrl %cl, %edx +; CHECK-NEXT: orl %esi, %edx +; CHECK-NEXT: movb %ch, %cl +; CHECK-NEXT: shll %cl, %eax +; CHECK-NEXT: popl %esi +; CHECK-NEXT: retl + %and = and i32 %bits, 31 + %sh_prom = zext i32 %and to i64 + %shl = shl i64 %val, %sh_prom + ret i64 %shl +} + +define i64 @test9(i64 %val, i32 %bits) nounwind { +; CHECK-LABEL: test9: +; CHECK: # BB#0: +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movb %ch, %cl +; CHECK-NEXT: shrl %cl, %esi +; CHECK-NEXT: leal (%edx,%edx), %eax +; CHECK-NEXT: andb $31, %cl +; CHECK-NEXT: xorb $31, %cl +; CHECK-NEXT: shll %cl, %eax +; CHECK-NEXT: orl %esi, %eax +; CHECK-NEXT: movb %ch, %cl +; CHECK-NEXT: sarl %cl, %edx +; CHECK-NEXT: popl %esi +; CHECK-NEXT: retl + %and = and i32 %bits, 31 + %sh_prom = zext i32 %and to i64 + %ashr = ashr i64 %val, %sh_prom + ret i64 %ashr +} + +define i64 @test10(i64 %val, i32 %bits) nounwind { +; CHECK-LABEL: test10: +; CHECK: # BB#0: +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movb %ch, %cl +; CHECK-NEXT: shrl %cl, %esi +; CHECK-NEXT: leal (%edx,%edx), %eax +; CHECK-NEXT: andb $31, %cl +; CHECK-NEXT: xorb $31, %cl +; CHECK-NEXT: shll %cl, %eax +; CHECK-NEXT: orl %esi, %eax +; CHECK-NEXT: movb %ch, %cl +; CHECK-NEXT: shrl %cl, %edx +; CHECK-NEXT: popl %esi +; CHECK-NEXT: retl + %and = and i32 %bits, 31 + %sh_prom = zext i32 %and to i64 + %lshr = lshr i64 %val, %sh_prom + ret i64 %lshr +} |
