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| author | Petar Jovanovic <petar.jovanovic@mips.com> | 2018-04-12 09:12:29 +0000 |
|---|---|---|
| committer | Petar Jovanovic <petar.jovanovic@mips.com> | 2018-04-12 09:12:29 +0000 |
| commit | 984db9ecbcb4a2f3780e92ca84cc3d433dac0f7d (patch) | |
| tree | 969653013ddc9ff3fbf734720ce5178fe79326d9 /llvm/test/CodeGen | |
| parent | 319ce96fe474a2b2a6f1747cb8f474b79471ca65 (diff) | |
| download | bcm5719-llvm-984db9ecbcb4a2f3780e92ca84cc3d433dac0f7d.tar.gz bcm5719-llvm-984db9ecbcb4a2f3780e92ca84cc3d433dac0f7d.zip | |
[MIPS GlobalISel] minor update to MIR tests added in r329819
Remove 'registers' section, as suggested (D. Sanders) at code review
https://reviews.llvm.org/D44304
llvm-svn: 329888
Diffstat (limited to 'llvm/test/CodeGen')
3 files changed, 0 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add.mir b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add.mir index 14a1503796d..8fc3a4774ca 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add.mir @@ -11,10 +11,6 @@ alignment: 2 legalized: true regBankSelected: true tracksRegLiveness: true -registers: - - { id: 0, class: gprb } - - { id: 1, class: gprb } - - { id: 2, class: gprb } body: | bb.0.entry: liveins: $a0, $a1 diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir index d87a97d9a6f..1a91f3ff05d 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir @@ -10,10 +10,6 @@ name: add_i32 alignment: 2 legalized: true tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } body: | bb.0.entry: liveins: $a0, $a1 diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add.mir index b7b122ac071..37bfba1b1e9 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add.mir @@ -10,10 +10,6 @@ name: add_i32 alignment: 2 legalized: true tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } body: | bb.0.entry: liveins: $a0, $a1 |
