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authorValery Pykhtin <Valery.Pykhtin@amd.com>2017-01-26 10:51:47 +0000
committerValery Pykhtin <Valery.Pykhtin@amd.com>2017-01-26 10:51:47 +0000
commit75d1de903f8a88d8b571ba44f764fff349dce381 (patch)
tree2b269b661d2e32841ee60b0e3c4385e7e172a062 /llvm/test/CodeGen
parent5b67a4f75fc87bf04a36439b36a17964be6acbd1 (diff)
downloadbcm5719-llvm-75d1de903f8a88d8b571ba44f764fff349dce381.tar.gz
bcm5719-llvm-75d1de903f8a88d8b571ba44f764fff349dce381.zip
[AMDGPU] Fix typo in GCNSchedStrategy
Differential revision: https://reviews.llvm.org/D28980 llvm-svn: 293171
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll11
1 files changed, 3 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
index e4f6e72e697..ca1b27e7cbc 100644
--- a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
@@ -4,16 +4,11 @@
; If spilling to smem, additional registers are used for the resource
; descriptor.
-; ALL-LABEL: {{^}}max_12_sgprs:
+; ALL-LABEL: {{^}}max_9_sgprs:
-; FIXME: Should be ablo to skip this copying of the private segment
-; buffer because all the SGPR spills are to VGPRs.
-
-; ALL: s_mov_b64 s[10:11], s[2:3]
-; ALL: s_mov_b64 s[8:9], s[0:1]
; ALL: SGPRBlocks: 1
-; ALL: NumSGPRsForWavesPerEU: 14
-define void @max_12_sgprs(i32 addrspace(1)* %out1,
+; ALL: NumSGPRsForWavesPerEU: 9
+define void @max_9_sgprs(i32 addrspace(1)* %out1,
i32 addrspace(1)* %out2,
i32 addrspace(1)* %out3,
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