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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2015-08-19 19:04:47 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2015-08-19 19:04:47 +0000 |
| commit | 5f1cea414123eff634d3d7e0320cdb3f0a825e57 (patch) | |
| tree | b4565431f56d5658ced6f6b84bd90ce67e762382 /llvm/test/CodeGen | |
| parent | e66a7ccf776b8d22819c4baa518a1d5825811c96 (diff) | |
| download | bcm5719-llvm-5f1cea414123eff634d3d7e0320cdb3f0a825e57.tar.gz bcm5719-llvm-5f1cea414123eff634d3d7e0320cdb3f0a825e57.zip | |
Temporary fix for the self-host failures introduced by rL244921.
This revision has introduced an issue that only affects bootstrapped compiler
when it is printing the ASM. I am working on resolving the issue, but in the
meantime, I'm disabling the legalization of scalar_to_vector operation for v2i64
and the associated testing until I can get this fixed.
llvm-svn: 245481
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/vsx.ll | 16 |
2 files changed, 11 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll b/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll index 535ddf4f574..01edab0eb76 100644 --- a/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll +++ b/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll @@ -59,9 +59,9 @@ entry: %splat.splatinsert = insertelement <2 x i64> undef, i64 %0, i32 0 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer ret <2 x i64> %splat.splat -; CHECK: mtvsrd {{[0-9]+}}, 3 -; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3 -; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]] +; FIXME-CHECK: mtvsrd {{[0-9]+}}, 3 +; FIXME-CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3 +; FIXME-CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]] } ; Function Attrs: nounwind diff --git a/llvm/test/CodeGen/PowerPC/vsx.ll b/llvm/test/CodeGen/PowerPC/vsx.ll index b4b1d248d1a..3820e19c077 100644 --- a/llvm/test/CodeGen/PowerPC/vsx.ll +++ b/llvm/test/CodeGen/PowerPC/vsx.ll @@ -1226,14 +1226,14 @@ define <2 x i32> @test80(i32 %v) { ; CHECK-FISL: blr ; CHECK-LE-LABEL: @test80 -; CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3 -; CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI -; CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]] -; CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]] -; CHECK-LE-DAG: xxspltd 34, [[V1]] -; CHECK-LE-DAG: xxswapd 35, [[V2]] -; CHECK-LE: vaddudm 2, 2, 3 -; CHECK-LE: blr +; FIXME-CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3 +; FIXME-CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI +; FIXME-CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]] +; FIXME-CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]] +; FIXME-CHECK-LE-DAG: xxspltd 34, [[V1]] +; FIXME-CHECK-LE-DAG: xxswapd 35, [[V2]] +; FIXME-CHECK-LE: vaddudm 2, 2, 3 +; FIXME-CHECK-LE: blr } define <2 x double> @test81(<4 x float> %b) { |
