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author | Alex Lorenz <arphaman@gmail.com> | 2015-08-19 18:55:47 +0000 |
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committer | Alex Lorenz <arphaman@gmail.com> | 2015-08-19 18:55:47 +0000 |
commit | e66a7ccf776b8d22819c4baa518a1d5825811c96 (patch) | |
tree | 99a6cfd9633af83e1982cd7e97439992edf381d4 /llvm/test/CodeGen | |
parent | 27fd06922b161a5559fb3ac6ef8e5b85efc9da04 (diff) | |
download | bcm5719-llvm-e66a7ccf776b8d22819c4baa518a1d5825811c96.tar.gz bcm5719-llvm-e66a7ccf776b8d22819c4baa518a1d5825811c96.zip |
MIR Serialization: Serialize defined registers that require 'def' register flag.
The defined registers are already serialized - they are represented by placing
them before the '=' in a machine instruction. However, certain instructions like
INLINEASM can have defined register operands after the '=', so this commit
introduces the 'def' register flag for such operands.
llvm-svn: 245480
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r-- | llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir new file mode 100644 index 00000000000..cad1d22030b --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir @@ -0,0 +1,29 @@ +# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s + +--- | + define i64 @test(i64 %x, i64 %y) #0 { + entry: + %x0 = call { i64, i64 } asm "foo", "=r,=r,1,0,~{dirflag},~{fpsr},~{flags}"(i64 %x, i64 %y) #0 + %x1 = extractvalue { i64, i64 } %x0, 0 + ret i64 %x1 + } + + attributes #0 = { nounwind } +... +--- +name: test +hasInlineAsm: true +tracksRegLiveness: true +liveins: + - { reg: '%rdi' } + - { reg: '%rsi' } +body: | + bb.0.entry: + liveins: %rdi, %rsi + + ; CHECK-LABEL: name: test + ; CHECK: INLINEASM $foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, + INLINEASM $foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi, 2147483657, killed %rsi, 12, implicit-def dead early-clobber %eflags + %rax = MOV64rr killed %rsi + RETQ killed %rax +... |