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authorSilviu Baranga <silviu.baranga@arm.com>2012-05-11 09:28:27 +0000
committerSilviu Baranga <silviu.baranga@arm.com>2012-05-11 09:28:27 +0000
commitddc67a76559e699ead5aa5f82cecfdebec75a8be (patch)
tree2c0e00d96041c6acc95cb2993be718bb71f24cde /llvm/test/CodeGen/X86/tls-pie.ll
parent5a719f9b9a4142f0d97894f37f084555146bb3d2 (diff)
downloadbcm5719-llvm-ddc67a76559e699ead5aa5f82cecfdebec75a8be.tar.gz
bcm5719-llvm-ddc67a76559e699ead5aa5f82cecfdebec75a8be.zip
Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.
llvm-svn: 156609
Diffstat (limited to 'llvm/test/CodeGen/X86/tls-pie.ll')
0 files changed, 0 insertions, 0 deletions
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