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authorCraig Topper <craig.topper@intel.com>2017-09-28 23:35:36 +0000
committerCraig Topper <craig.topper@intel.com>2017-09-28 23:35:36 +0000
commit6255c7b6755acc5d4f38dea359fcbeba13fa776f (patch)
treee6536fca143a6cd284082de5081512e02f242d9e /llvm/test/CodeGen/X86/tbm_patterns.ll
parent43e6f7bee52feba6d7af9f414bc5e8f256ebddf2 (diff)
downloadbcm5719-llvm-6255c7b6755acc5d4f38dea359fcbeba13fa776f.tar.gz
bcm5719-llvm-6255c7b6755acc5d4f38dea359fcbeba13fa776f.zip
[X86] Don't select (cmp (and, imm), 0) to testw
Summary: X86ISelDAGToDAG tries to analyze ANDs compared with 0 to optimize to narrower immediates using subregisters. I don't think we should be optimizing to 16-bit test instructions. It goes against our normal behavior of promoting i16 operations to i32. It only saves one byte due to the need to add a 0x66 prefix. I think it would also be subject to a length changing prefix penalty in the decoders on Intel CPUs. Reviewers: RKSimon, zvi, spatel Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38273 llvm-svn: 314474
Diffstat (limited to 'llvm/test/CodeGen/X86/tbm_patterns.ll')
-rw-r--r--llvm/test/CodeGen/X86/tbm_patterns.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll
index a72b5405615..e459e173eda 100644
--- a/llvm/test/CodeGen/X86/tbm_patterns.ll
+++ b/llvm/test/CodeGen/X86/tbm_patterns.ll
@@ -53,7 +53,7 @@ define i32 @test_x86_tbm_bextri_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_bextri_u32_z2:
; CHECK: # BB#0:
; CHECK-NEXT: shrl $4, %edi
-; CHECK-NEXT: testw $4095, %di # imm = 0xFFF
+; CHECK-NEXT: testl $4095, %edi # imm = 0xFFF
; CHECK-NEXT: cmovnel %edx, %esi
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: retq
@@ -114,7 +114,7 @@ define i64 @test_x86_tbm_bextri_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {
; CHECK-LABEL: test_x86_tbm_bextri_u64_z2:
; CHECK: # BB#0:
; CHECK-NEXT: shrl $4, %edi
-; CHECK-NEXT: testw $4095, %di # imm = 0xFFF
+; CHECK-NEXT: testl $4095, %edi # imm = 0xFFF
; CHECK-NEXT: cmovneq %rdx, %rsi
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: retq
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