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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2015-01-21 17:07:06 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2015-01-21 17:07:06 +0000
commit8f09e9f7c5b356747df93a45a3dc30b18607e86d (patch)
tree17e6cb8e73f7d68afa5ccff33f413f9d602a7f7a /llvm/test/CodeGen/X86/pointer-vector.ll
parent469e2ee83af2a06ed84341d21521e07bd0a3ce8e (diff)
downloadbcm5719-llvm-8f09e9f7c5b356747df93a45a3dc30b18607e86d.tar.gz
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[X86] Declare SSE4.1/AVX2 vector extloads covered by PMOV[SZ]X legal.
Now that we can fully specify extload legality, we can declare them legal for the PMOVSX/PMOVZX instructions. This for instance enables a DAGCombine to fire on code such as (and (<zextload-equivalent> ...), <redundant mask>) to turn it into: (zextload ...) as seen in the testcase changes. There is one regression, in widen_load-2.ll: we're no longer able to do store-to-load forwarding with illegal extload memory types. This will be addressed separately. Differential Revision: http://reviews.llvm.org/D6533 llvm-svn: 226676
Diffstat (limited to 'llvm/test/CodeGen/X86/pointer-vector.ll')
-rw-r--r--llvm/test/CodeGen/X86/pointer-vector.ll3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/pointer-vector.ll b/llvm/test/CodeGen/X86/pointer-vector.ll
index 0ee99875264..5e0c2dae083 100644
--- a/llvm/test/CodeGen/X86/pointer-vector.ll
+++ b/llvm/test/CodeGen/X86/pointer-vector.ll
@@ -81,8 +81,7 @@ define <4 x i32*> @INT2PTR1(<4 x i8>* %p) nounwind {
entry:
%G = load <4 x i8>* %p
;CHECK: movl
-;CHECK: pmovzxbd
-;CHECK: pand
+;CHECK: pmovzxbd (%
%K = inttoptr <4 x i8> %G to <4 x i32*>
;CHECK: ret
ret <4 x i32*> %K
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