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authorCraig Topper <craig.topper@intel.com>2019-04-05 19:28:09 +0000
committerCraig Topper <craig.topper@intel.com>2019-04-05 19:28:09 +0000
commit80aa2290fb02386579e5d7b0a1d8ce3691fd88da (patch)
tree1978efce308a80e3eb9b48155418940531556fb2 /llvm/test/CodeGen/X86/implicit-null-checks.mir
parent7323c2bf850b61b85252e17e6f1f73037c328378 (diff)
downloadbcm5719-llvm-80aa2290fb02386579e5d7b0a1d8ce3691fd88da.tar.gz
bcm5719-llvm-80aa2290fb02386579e5d7b0a1d8ce3691fd88da.zip
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary: This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes. Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser. Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon Reviewed By: RKSimon Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60228 llvm-svn: 357802
Diffstat (limited to 'llvm/test/CodeGen/X86/implicit-null-checks.mir')
-rw-r--r--llvm/test/CodeGen/X86/implicit-null-checks.mir92
1 files changed, 46 insertions, 46 deletions
diff --git a/llvm/test/CodeGen/X86/implicit-null-checks.mir b/llvm/test/CodeGen/X86/implicit-null-checks.mir
index 5704d0cca8d..d7983553cc9 100644
--- a/llvm/test/CodeGen/X86/implicit-null-checks.mir
+++ b/llvm/test/CodeGen/X86/implicit-null-checks.mir
@@ -399,7 +399,7 @@ body: |
liveins: $esi, $rdi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.3, implicit $eflags
+ JCC_1 %bb.3, 4, implicit $eflags
bb.1.not_null:
liveins: $esi, $rdi
@@ -407,7 +407,7 @@ body: |
$eax = MOV32ri 2200000
$eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
CMP32rr killed $eax, killed $esi, implicit-def $eflags
- JE_1 %bb.4, implicit $eflags
+ JCC_1 %bb.4, 4, implicit $eflags
bb.2.ret_200:
$eax = MOV32ri 200
@@ -433,7 +433,7 @@ liveins:
# CHECK: bb.0.entry:
# CHECK: $eax = MOV32rm killed $rdx, 1, $noreg, 0, $noreg :: (volatile load 4 from %ir.ptr)
# CHECK-NEXT: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.3, implicit $eflags
+# CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags
body: |
bb.0.entry:
@@ -441,7 +441,7 @@ body: |
$eax = MOV32rm killed $rdx, 1, $noreg, 0, $noreg :: (volatile load 4 from %ir.ptr)
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.3, implicit $eflags
+ JCC_1 %bb.3, 4, implicit $eflags
bb.1.not_null:
liveins: $esi, $rdi
@@ -449,7 +449,7 @@ body: |
$eax = MOV32ri 2200000
$eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
CMP32rr killed $eax, killed $esi, implicit-def $eflags
- JE_1 %bb.4, implicit $eflags
+ JCC_1 %bb.4, 4, implicit $eflags
bb.2.ret_200:
@@ -475,14 +475,14 @@ liveins:
- { reg: '$esi' }
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.3, implicit $eflags
+# CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags
body: |
bb.0.entry:
liveins: $esi, $rdi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.3, implicit $eflags
+ JCC_1 %bb.3, 4, implicit $eflags
bb.1.not_null:
liveins: $esi, $rdi
@@ -491,7 +491,7 @@ body: |
$eax = ADD32ri killed $eax, 100, implicit-def dead $eflags
$eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
CMP32rr killed $eax, killed $esi, implicit-def $eflags
- JE_1 %bb.4, implicit $eflags
+ JCC_1 %bb.4, 4, implicit $eflags
bb.2.ret_200:
$eax = MOV32ri 200
@@ -516,14 +516,14 @@ liveins:
- { reg: '$rsi' }
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.3, implicit $eflags
+# CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags
body: |
bb.0.entry:
liveins: $rsi, $rdi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.3, implicit $eflags
+ JCC_1 %bb.3, 4, implicit $eflags
bb.1.not_null:
liveins: $rsi, $rdi
@@ -531,7 +531,7 @@ body: |
$rdi = MOV64ri 5000
$rdi = AND64rm killed $rdi, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
CMP64rr killed $rdi, killed $rsi, implicit-def $eflags
- JE_1 %bb.4, implicit $eflags
+ JCC_1 %bb.4, 4, implicit $eflags
bb.2.ret_200:
$eax = MOV32ri 200
@@ -563,7 +563,7 @@ body: |
liveins: $rsi, $rdi, $rdx
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.3, implicit $eflags
+ JCC_1 %bb.3, 4, implicit $eflags
bb.1.not_null:
liveins: $rsi, $rdi, $rdx
@@ -572,7 +572,7 @@ body: |
$rbx = AND64rm killed $rbx, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
$rdx = MOV64ri 0
CMP64rr killed $rbx, killed $rsi, implicit-def $eflags
- JE_1 %bb.4, implicit $eflags
+ JCC_1 %bb.4, 4, implicit $eflags
bb.2.ret_200:
$eax = MOV32ri 200
@@ -611,7 +611,7 @@ body: |
CFI_INSTRUCTION offset $rbx, -16
$rbx = MOV64rr $rdi
TEST64rr $rbx, $rbx, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.stay:
liveins: $rbx
@@ -648,7 +648,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -682,7 +682,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -713,7 +713,7 @@ body: |
liveins: $rsi, $rdi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.1, implicit $eflags
+ JCC_1 %bb.1, 4, implicit $eflags
bb.2.not_null:
liveins: $rdi, $rsi
@@ -745,7 +745,7 @@ body: |
liveins: $rsi, $rdi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.1, implicit $eflags
+ JCC_1 %bb.1, 4, implicit $eflags
bb.2.not_null:
liveins: $rdi, $rsi
@@ -778,7 +778,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -808,7 +808,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -839,7 +839,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -857,7 +857,7 @@ name: inc_store_with_dep_in_null
# CHECK-LABEL: inc_store_with_dep_in_null
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -870,7 +870,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -892,7 +892,7 @@ name: inc_store_with_volatile
# CHECK-LABEL: inc_store_with_volatile
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -905,7 +905,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -922,7 +922,7 @@ name: inc_store_with_two_dep
# CHECK-LABEL: inc_store_with_two_dep
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -935,7 +935,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -954,7 +954,7 @@ name: inc_store_with_redefined_base
# CHECK-LABEL: inc_store_with_redefined_base
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -967,7 +967,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -998,7 +998,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1017,7 +1017,7 @@ name: inc_store_across_call
# CHECK-LABEL: inc_store_across_call
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rbx, $rbx, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1037,7 +1037,7 @@ body: |
CFI_INSTRUCTION offset $rbx, -16
$rbx = MOV64rr killed $rdi
TEST64rr $rbx, $rbx, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rbx
@@ -1059,7 +1059,7 @@ name: inc_store_with_dep_in_dep
# CHECK-LABEL: inc_store_with_dep_in_dep
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1072,7 +1072,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1092,7 +1092,7 @@ name: inc_store_with_load_over_store
# CHECK-LABEL: inc_store_with_load_over_store
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1105,7 +1105,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1124,7 +1124,7 @@ name: inc_store_with_store_over_load
# CHECK-LABEL: inc_store_with_store_over_load
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1137,7 +1137,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1156,7 +1156,7 @@ name: inc_store_with_store_over_store
# CHECK-LABEL: inc_store_with_store_over_store
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1169,7 +1169,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1200,7 +1200,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1231,7 +1231,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1250,7 +1250,7 @@ name: inc_store_and_load_alias
# CHECK-LABEL: inc_store_and_load_alias
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1263,7 +1263,7 @@ body: |
liveins: $rdi, $rsi
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
@@ -1282,7 +1282,7 @@ name: inc_spill_dep
# CHECK-LABEL: inc_spill_dep
# CHECK: bb.0.entry:
# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
# CHECK: bb.1.not_null
alignment: 4
@@ -1299,7 +1299,7 @@ body: |
$rsp = frame-setup SUB64ri8 $rsp, 8, implicit-def dead $eflags
MOV32mr $rsp, 1, $noreg, 0, $noreg, $esi :: (store 4 into %stack.0)
TEST64rr $rdi, $rdi, implicit-def $eflags
- JE_1 %bb.2, implicit killed $eflags
+ JCC_1 %bb.2, 4, implicit killed $eflags
bb.1.not_null:
liveins: $rdi, $rsi
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