[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.

Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.

Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon

Reviewed By: RKSimon

Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60228

llvm-svn: 357802

46 files changed, 232 insertions, 232 deletions

diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-brcond.mir b/llvm/test/CodeGen/X86/GlobalISel/select-brcond.mir
index d5258d83787..1906a00e12e 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-brcond.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-brcond.mir
@@ -33,7 +33,7 @@ registers:
 # CHECK-NEXT:    %3:gr32 = MOV32ri 1
 # CHECK-NEXT:    %1:gr8 = COPY %0.sub_8bit
 # CHECK-NEXT:    TEST8ri %1, 1, implicit-def $eflags
-# CHECK-NEXT:    JNE_1 %[[TRUE:bb.[0-9]+]], implicit $eflags
+# CHECK-NEXT:    JCC_1 %[[TRUE:bb.[0-9]+]], 5, implicit $eflags
 # CHECK-NEXT:    JMP_1 %[[FALSE:bb.[0-9]+]]
 # CHECK:      [[TRUE]].{{[a-zA-Z0-9]+}}:
 # CHECK-NEXT:    $eax = COPY %2
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir b/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
index 1c0f4bc251d..4323288fe1b 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
@@ -129,7 +129,7 @@ body:             |
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
   ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
   ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
-  ; ALL:   JNE_1 %bb.2, implicit $eflags
+  ; ALL:   JCC_1 %bb.2, 5, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
   ; ALL: bb.2.cond.end:
@@ -188,7 +188,7 @@ body:             |
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
   ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
   ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
-  ; ALL:   JNE_1 %bb.2, implicit $eflags
+  ; ALL:   JCC_1 %bb.2, 5, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
   ; ALL: bb.2.cond.end:
@@ -243,7 +243,7 @@ body:             |
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
   ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
   ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
-  ; ALL:   JNE_1 %bb.1, implicit $eflags
+  ; ALL:   JCC_1 %bb.1, 5, implicit $eflags
   ; ALL:   JMP_1 %bb.2
   ; ALL: bb.1.cond.true:
   ; ALL:   successors: %bb.3(0x80000000)
@@ -306,7 +306,7 @@ body:             |
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
   ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
   ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
-  ; ALL:   JNE_1 %bb.1, implicit $eflags
+  ; ALL:   JCC_1 %bb.1, 5, implicit $eflags
   ; ALL:   JMP_1 %bb.2
   ; ALL: bb.1.cond.true:
   ; ALL:   successors: %bb.3(0x80000000)
@@ -378,7 +378,7 @@ body:             |
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
   ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
   ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
-  ; ALL:   JNE_1 %bb.2, implicit $eflags
+  ; ALL:   JCC_1 %bb.2, 5, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
   ; ALL: bb.2.cond.end:
@@ -439,7 +439,7 @@ body:             |
   ; ALL:   CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
   ; ALL:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
   ; ALL:   TEST8ri [[SETCCr]], 1, implicit-def $eflags
-  ; ALL:   JNE_1 %bb.2, implicit $eflags
+  ; ALL:   JCC_1 %bb.2, 5, implicit $eflags
   ; ALL: bb.1.cond.false:
   ; ALL:   successors: %bb.2(0x80000000)
   ; ALL: bb.2.cond.end:
diff --git a/llvm/test/CodeGen/X86/PR37310.mir b/llvm/test/CodeGen/X86/PR37310.mir
index 6f09a8987eb..cb6a4b2ca6d 100644
--- a/llvm/test/CodeGen/X86/PR37310.mir
+++ b/llvm/test/CodeGen/X86/PR37310.mir
@@ -114,7 +114,7 @@ body:             |
   
     %0:gr32 = COPY $edi
     %1:gr32 = SUB32ri8 %0, 3, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
     JMP_1 %bb.1
   
   bb.1.if.then:
diff --git a/llvm/test/CodeGen/X86/block-placement.mir b/llvm/test/CodeGen/X86/block-placement.mir
index bd8f4463146..04444bea952 100644
--- a/llvm/test/CodeGen/X86/block-placement.mir
+++ b/llvm/test/CodeGen/X86/block-placement.mir
@@ -60,7 +60,7 @@ body:             |
     frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
     CFI_INSTRUCTION def_cfa_offset 16
     TEST8ri $sil, 1, implicit-def $eflags, implicit killed $esi
-    JE_1 %bb.3, implicit killed $eflags
+    JCC_1 %bb.3, 4, implicit killed $eflags
   
   bb.1.left:
     successors: %bb.2(0x7ffff800), %bb.4(0x00000800)
diff --git a/llvm/test/CodeGen/X86/branchfolding-undef.mir b/llvm/test/CodeGen/X86/branchfolding-undef.mir
index d6fb427c223..66d0cb5152e 100644
--- a/llvm/test/CodeGen/X86/branchfolding-undef.mir
+++ b/llvm/test/CodeGen/X86/branchfolding-undef.mir
@@ -16,7 +16,7 @@ name: func
 tracksRegLiveness: true
 body: |
   bb.0:
-    JE_1 %bb.1, implicit undef $eflags
+    JCC_1 %bb.1, 4, implicit undef $eflags
     JMP_1 %bb.2
 
   bb.1:
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
index 3ab321c0d31..ffd1b21370a 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
@@ -7,7 +7,7 @@
 name: foo
 body: |
   bb.0:
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
   bb.1:
     CFI_INSTRUCTION def_cfa_offset 24
   bb.2:
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
index 809cd377e76..a1b3a68c85f 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
@@ -8,7 +8,7 @@ name: testNoreturnBlock
 body: |
   bb.0:
     CFI_INSTRUCTION def_cfa_offset 24
-    JNE_1 %bb.2, implicit undef $eflags
+    JCC_1 %bb.2, 5, implicit undef $eflags
 
   bb.1:
     CFI_INSTRUCTION def_cfa_offset 32
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
index 9ea5587fd97..77962d7fbfa 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
@@ -16,7 +16,7 @@ name: inconsistentOffset
 body: |
   bb.0:
     CFI_INSTRUCTION def_cfa_offset 24
-    JNE_1 %bb.2, implicit undef $eflags
+    JCC_1 %bb.2, 5, implicit undef $eflags
 
   bb.1:
     CFI_INSTRUCTION def_cfa_offset 32
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
index 33bfac299b2..1a247824bc9 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
@@ -16,7 +16,7 @@ name: inconsistentRegister
 body: |
   bb.0:
     CFI_INSTRUCTION def_cfa_register $rbp
-    JNE_1 %bb.2, implicit undef $eflags
+    JCC_1 %bb.2, 5, implicit undef $eflags
 
   bb.1:
     CFI_INSTRUCTION def_cfa $rsp, 8
diff --git a/llvm/test/CodeGen/X86/cmovcmov.ll b/llvm/test/CodeGen/X86/cmovcmov.ll
index cc64143a887..b27eccbb2cd 100644
--- a/llvm/test/CodeGen/X86/cmovcmov.ll
+++ b/llvm/test/CodeGen/X86/cmovcmov.ll
@@ -312,9 +312,9 @@ attributes #0 = { nounwind }
 ;
 ; The first two cmovs got expanded to:
 ; %bb.0:
-;   JL_1 %bb.9
+;   JCC_1 %bb.9, 12
 ; %bb.7:
-;   JG_1 %bb.9
+;   JCC_1 %bb.9, 15
 ; %bb.8:
 ; %bb.9:
 ;   %12 = phi(%7, %bb.8, %11, %bb.0, %12, %bb.7)
diff --git a/llvm/test/CodeGen/X86/conditional-tailcall-samedest.mir b/llvm/test/CodeGen/X86/conditional-tailcall-samedest.mir
index ab75e3f6b52..d311bb2458d 100644
--- a/llvm/test/CodeGen/X86/conditional-tailcall-samedest.mir
+++ b/llvm/test/CodeGen/X86/conditional-tailcall-samedest.mir
@@ -105,14 +105,14 @@ body:             |
     liveins: $edi
   
     CMP32ri8 killed $edi, 2, implicit-def $eflags
-    JB_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 2, implicit $eflags
     JMP_1 %bb.1
   
   bb.1.entry:
     successors: %bb.4(0x40000000), %bb.5(0x40000000)
     liveins: $eflags
   
-    JE_1 %bb.4, implicit killed $eflags
+    JCC_1 %bb.4, 4, implicit killed $eflags
     JMP_1 %bb.5
   
   bb.2.sw.bb:
@@ -120,7 +120,7 @@ body:             |
   
     $al = MOV8rm $rip, 1, $noreg, @static_local_guard, $noreg :: (volatile load acquire 1 from `i8* bitcast (i64* @static_local_guard to i8*)`, align 8)
     TEST8rr killed $al, $al, implicit-def $eflags
-    JNE_1 %bb.6, implicit killed $eflags
+    JCC_1 %bb.6, 5, implicit killed $eflags
     JMP_1 %bb.3
   
   bb.3.init.check.i:
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
index def14391a51..f218c0c6477 100644
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
@@ -78,7 +78,7 @@
 # CHECK: bb.10.for.body.9
 # CHECK: renamable $al
 # CHECK-NEXT: TEST8rr killed renamable $al
-# CHECK-NEXT: JNE_1
+# CHECK-NEXT: JCC_1
 # CHECK-NOT: $al = IMPLICIT_DEF
 # CHECK: bb.12.for.body.10
 
@@ -93,7 +93,7 @@ body:             |
   
     renamable $al = MOV8ri 1
     TEST8rr renamable $al, renamable $al, implicit-def $eflags
-    JNE_1 %bb.4, implicit killed $eflags
+    JCC_1 %bb.4, 5, implicit killed $eflags
   
   bb.1.for.cond.cleanup:
     successors: %bb.3, %bb.2
@@ -101,7 +101,7 @@ body:             |
   
     renamable $eax = MOV32rm $rsp, 1, $noreg, -16, $noreg 
     CMP32rm killed renamable $eax, $rip, 1, $noreg, $noreg, $noreg, implicit-def $eflags 
-    JBE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 6, implicit $eflags
   
   bb.2:
     successors: %bb.3
@@ -117,7 +117,7 @@ body:             |
   
     renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
     TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.5.for.body.1:
     successors: %bb.1, %bb.6
@@ -125,13 +125,13 @@ body:             |
   
     renamable $al = MOV8ri 1
     TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.6.for.body.2:
     successors: %bb.1, %bb.7
     liveins: $ecx, $eflags, $rdi
   
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.7.for.body.3:
     successors: %bb.1, %bb.8
@@ -139,13 +139,13 @@ body:             |
   
     renamable $al = MOV8ri 1
     TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.8.for.body.4:
     successors: %bb.1, %bb.9
     liveins: $ecx, $eflags, $rdi
   
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.9.for.body.5:
     successors: %bb.1, %bb.10
@@ -153,13 +153,13 @@ body:             |
   
     renamable $al = MOV8ri 1
     TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.10.for.body.6:
     successors: %bb.1, %bb.11
     liveins: $ecx, $eflags, $rdi
   
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.11.for.body.7:
     successors: %bb.1, %bb.12
@@ -167,13 +167,13 @@ body:             |
   
     renamable $al = MOV8ri 1
     TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.12.for.body.8:
     successors: %bb.1, %bb.13
     liveins: $ecx, $eflags, $rdi
   
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 5, implicit $eflags
   
   bb.13.for.body.9:
     successors: %bb.14, %bb.15
@@ -181,7 +181,7 @@ body:             |
   
     renamable $al = MOV8ri 1
     TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
-    JE_1 %bb.15, implicit $eflags
+    JCC_1 %bb.15, 4, implicit $eflags
   
   bb.14:
     successors: %bb.1
@@ -194,7 +194,7 @@ body:             |
     successors: %bb.16, %bb.17
     liveins: $eflags, $rdi
   
-    JE_1 %bb.17, implicit killed $eflags
+    JCC_1 %bb.17, 4, implicit killed $eflags
   
   bb.16:
     successors: %bb.1
diff --git a/llvm/test/CodeGen/X86/debugloc-no-line-0.ll b/llvm/test/CodeGen/X86/debugloc-no-line-0.ll
index 50328d6faeb..c68dd296a9b 100644
--- a/llvm/test/CodeGen/X86/debugloc-no-line-0.ll
+++ b/llvm/test/CodeGen/X86/debugloc-no-line-0.ll
@@ -7,7 +7,7 @@
 ; CHECK: JMP{{.*}}%bb.4, debug-location ![[JUMPLOC:[0-9]+]]
 ; CHECK: bb.4.entry:
 ; CHECK: successors:
-; CHECK: JE{{.*}}debug-location ![[JUMPLOC]]
+; CHECK: JCC{{.*}}debug-location ![[JUMPLOC]]
 ; CHECK: JMP{{.*}}debug-location ![[JUMPLOC]]
 
 define i32 @main() !dbg !12 {
diff --git a/llvm/test/CodeGen/X86/domain-reassignment.mir b/llvm/test/CodeGen/X86/domain-reassignment.mir
index 6cf7fa6e3ac..7f02ddaa9d3 100644
--- a/llvm/test/CodeGen/X86/domain-reassignment.mir
+++ b/llvm/test/CodeGen/X86/domain-reassignment.mir
@@ -123,7 +123,7 @@ body:             |
   ; CHECK:   [[COPY7:%[0-9]+]]:gr32 = COPY $edi
   ; CHECK:   [[COPY8:%[0-9]+]]:gr8 = COPY [[COPY7]].sub_8bit
   ; CHECK:   TEST8ri killed [[COPY8]], 1, implicit-def $eflags
-  ; CHECK:   JE_1 %bb.2, implicit $eflags
+  ; CHECK:   JCC_1 %bb.2, 4, implicit $eflags
   ; CHECK:   JMP_1 %bb.1
   ; CHECK: bb.1.if:
   ; CHECK:   successors: %bb.3(0x80000000)
@@ -160,7 +160,7 @@ body:             |
     %3 = COPY $edi
     %11 = COPY %3.sub_8bit
     TEST8ri killed %11, 1, implicit-def $eflags
-    JE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 4, implicit $eflags
     JMP_1 %bb.1
 
   bb.1.if:
@@ -310,7 +310,7 @@ body:             |
 
     ; FIXME We can't replace TEST with KTEST due to flag differences
     ; TEST8rr %18, %18, implicit-def $eflags
-    ; JE_1 %bb.1, implicit $eflags
+    ; JCC_1 %bb.1, 4, implicit $eflags
     ; JMP_1 %bb.2
 
   bb.1:
@@ -427,7 +427,7 @@ body:             |
 
     ; FIXME We can't replace TEST with KTEST due to flag differences
     ; FIXME TEST16rr %17, %17, implicit-def $eflags
-    ; FIXME JE_1 %bb.1, implicit $eflags
+    ; FIXME JCC_1 %bb.1, 4, implicit $eflags
     ; FIXME JMP_1 %bb.2
 
   bb.1:
@@ -530,7 +530,7 @@ body:             |
 
     ; FIXME We can't replace TEST with KTEST due to flag differences
     ; FIXME TEST32rr %13, %13, implicit-def $eflags
-    ; FIXME JE_1 %bb.1, implicit $eflags
+    ; FIXME JCC_1 %bb.1, 4, implicit $eflags
     ; FIXME JMP_1 %bb.2
 
   bb.1:
@@ -633,7 +633,7 @@ body:             |
 
     ; FIXME We can't replace TEST with KTEST due to flag differences
     ; FIXME TEST64rr %13, %13, implicit-def $eflags
-    ; FIXME JE_1 %bb.1, implicit $eflags
+    ; FIXME JCC_1 %bb.1, 4, implicit $eflags
     ; FIXME JMP_1 %bb.2
 
   bb.1:
diff --git a/llvm/test/CodeGen/X86/fixup-bw-inst.mir b/llvm/test/CodeGen/X86/fixup-bw-inst.mir
index c5ccaa46f37..fe39251d6e9 100644
--- a/llvm/test/CodeGen/X86/fixup-bw-inst.mir
+++ b/llvm/test/CodeGen/X86/fixup-bw-inst.mir
@@ -97,7 +97,7 @@ body:             |
     liveins: $rdi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
 
   bb.2.if.then:
     liveins: $rdi
diff --git a/llvm/test/CodeGen/X86/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
index 01b902bddae..f8bf3837bda 100644
--- a/llvm/test/CodeGen/X86/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
@@ -128,19 +128,19 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
-    JA_1 %bb.1, implicit $eflags
-    JB_1 %bb.2, implicit $eflags
+    JCC_1 %bb.1, 7, implicit $eflags
+    JCC_1 %bb.2, 2, implicit $eflags
     JMP_1 %bb.3
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.1, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.1, 5, implicit killed $eflags
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT: bb.4:
   ; CHECK-NEXT:   successors: {{.*$}}
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT:   TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.2, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed $eflags
   ; CHECK-NEXT:   JMP_1 %bb.3
   
   bb.1:
@@ -184,18 +184,18 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
-    JA_1 %bb.2, implicit $eflags
-    JB_1 %bb.3, implicit $eflags
+    JCC_1 %bb.2, 7, implicit $eflags
+    JCC_1 %bb.3, 2, implicit $eflags
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.2, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed $eflags
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT: bb.4:
   ; CHECK-NEXT:   successors: {{.*$}}
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT:   TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.3, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.3, 5, implicit killed $eflags
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT:   bb.1:
 
@@ -610,19 +610,19 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
-    JA_1 %bb.1, implicit $eflags
-    JB_1 %bb.2, implicit $eflags
+    JCC_1 %bb.1, 7, implicit $eflags
+    JCC_1 %bb.2, 2, implicit $eflags
     JMP_1 %bb.3
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.1, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.1, 5, implicit killed $eflags
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT: bb.4:
   ; CHECK-NEXT:   successors: {{.*$}}
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT:   TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.2, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed $eflags
   ; CHECK-NEXT:   JMP_1 %bb.3
 
   bb.1:
@@ -685,19 +685,19 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
-    JA_1 %bb.1, implicit $eflags
-    JB_1 %bb.2, implicit $eflags
+    JCC_1 %bb.1, 7, implicit $eflags
+    JCC_1 %bb.2, 2, implicit $eflags
     JMP_1 %bb.5
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.1, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.1, 5, implicit killed $eflags
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT: bb.6:
   ; CHECK-NEXT:   successors: {{.*$}}
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT:   TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.2, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed $eflags
   ; CHECK-NEXT:   JMP_1 %bb.5
 
   bb.1:
@@ -717,12 +717,12 @@ body:             |
     successors: %bb.3, %bb.4
     liveins: $eflags
 
-    JO_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 0, implicit $eflags
     JMP_1 %bb.4
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[O_REG]], %[[O_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.3, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.3, 5, implicit killed $eflags
   ; CHECK-NEXT:   JMP_1 %bb.4
 
   bb.3:
@@ -820,7 +820,7 @@ body:             |
     liveins: $eflags
 
     ; Outer loop header, target for one set of hoisting.
-    JE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 4, implicit $eflags
     JMP_1 %bb.4
   ; CHECK:      bb.1:
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
@@ -836,12 +836,12 @@ body:             |
     ; Inner loop with a local copy. We should eliminate this but can't hoist.
     %2:gr64 = COPY $eflags
     $eflags = COPY %2
-    JE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 4, implicit $eflags
     JMP_1 %bb.3
   ; CHECK:      bb.2:
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
   ; CHECK:        TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.2, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
   bb.3:
@@ -863,12 +863,12 @@ body:             |
     liveins: $eflags
 
     ; Another inner loop, this one with a diamond.
-    JE_1 %bb.5, implicit $eflags
+    JCC_1 %bb.5, 4, implicit $eflags
     JMP_1 %bb.6
   ; CHECK:      bb.4:
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
   ; CHECK:        TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.5, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.5, 5, implicit killed $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
   bb.5:
@@ -914,12 +914,12 @@ body:             |
     liveins: $eflags
 
     ; Inner loop latch.
-    JE_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 4, implicit $eflags
     JMP_1 %bb.8
   ; CHECK:      bb.7:
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
   ; CHECK:        TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.4, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.4, 5, implicit killed $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
   bb.8:
@@ -928,12 +928,12 @@ body:             |
     ; Outer loop latch. Note that we cannot have EFLAGS live-in here as that
     ; immediately require PHIs.
     CMP64rr %0, %1, implicit-def $eflags
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
     JMP_1 %bb.9
   ; CHECK:      bb.8:
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
   ; CHECK:        CMP64rr %0, %1, implicit-def $eflags
-  ; CHECK-NEXT:   JE_1 %bb.1, implicit $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.1, 4, implicit $eflags
   ; CHECK-NOT:    COPY{{( killed)?}} $eflags
 
   bb.9:
@@ -975,19 +975,19 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %4
-    JA_1 %bb.1, implicit $eflags
-    JB_1 %bb.2, implicit $eflags
+    JCC_1 %bb.1, 7, implicit $eflags
+    JCC_1 %bb.2, 2, implicit $eflags
     JMP_1 %bb.3
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.1, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.1, 5, implicit killed $eflags
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT: bb.4:
   ; CHECK-NEXT:   successors: {{.*$}}
   ; CHECK-SAME: {{$[[:space:]]}}
   ; CHECK-NEXT:   TEST8rr %[[AE_REG]], %[[AE_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JE_1 %bb.2, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 4, implicit killed $eflags
   ; CHECK-NEXT:   JMP_1 %bb.3
 
   bb.1:
@@ -1036,12 +1036,12 @@ body:             |
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
 
     $eflags = COPY %2
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
     JMP_1 %bb.2
   ; CHECK-NOT: $eflags =
   ;
   ; CHECK:        TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
-  ; CHECK-NEXT:   JNE_1 %bb.1, implicit killed $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.1, 5, implicit killed $eflags
   ; CHECK-NEXT:   JMP_1 %bb.2
 
   bb.1:
diff --git a/llvm/test/CodeGen/X86/implicit-null-checks.mir b/llvm/test/CodeGen/X86/implicit-null-checks.mir
index 5704d0cca8d..d7983553cc9 100644
--- a/llvm/test/CodeGen/X86/implicit-null-checks.mir
+++ b/llvm/test/CodeGen/X86/implicit-null-checks.mir
@@ -399,7 +399,7 @@ body:             |
     liveins: $esi, $rdi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
 
   bb.1.not_null:
     liveins: $esi, $rdi
@@ -407,7 +407,7 @@ body:             |
     $eax = MOV32ri 2200000
     $eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
     CMP32rr killed $eax, killed $esi, implicit-def $eflags
-    JE_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 4, implicit $eflags
 
   bb.2.ret_200:
     $eax = MOV32ri 200
@@ -433,7 +433,7 @@ liveins:
 # CHECK: bb.0.entry:
 # CHECK:    $eax = MOV32rm killed $rdx, 1, $noreg, 0, $noreg :: (volatile load 4 from %ir.ptr)
 # CHECK-NEXT:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.3, implicit $eflags
+# CHECK-NEXT:    JCC_1 %bb.3, 4, implicit $eflags
 
 body:             |
   bb.0.entry:
@@ -441,7 +441,7 @@ body:             |
 
     $eax = MOV32rm killed $rdx, 1, $noreg, 0, $noreg :: (volatile load 4 from %ir.ptr)
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
 
   bb.1.not_null:
     liveins: $esi, $rdi
@@ -449,7 +449,7 @@ body:             |
     $eax = MOV32ri 2200000
     $eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
     CMP32rr killed $eax, killed $esi, implicit-def $eflags
-    JE_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 4, implicit $eflags
 
   bb.2.ret_200:
 
@@ -475,14 +475,14 @@ liveins:
   - { reg: '$esi' }
 # CHECK:  bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.3, implicit $eflags
+# CHECK-NEXT:    JCC_1 %bb.3, 4, implicit $eflags
 
 body:             |
   bb.0.entry:
     liveins: $esi, $rdi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
 
   bb.1.not_null:
     liveins: $esi, $rdi
@@ -491,7 +491,7 @@ body:             |
     $eax = ADD32ri killed $eax, 100, implicit-def dead $eflags
     $eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
     CMP32rr killed $eax, killed $esi, implicit-def $eflags
-    JE_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 4, implicit $eflags
 
   bb.2.ret_200:
     $eax = MOV32ri 200
@@ -516,14 +516,14 @@ liveins:
   - { reg: '$rsi' }
 # CHECK:  bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.3, implicit $eflags
+# CHECK-NEXT:    JCC_1 %bb.3, 4, implicit $eflags
 
 body:             |
   bb.0.entry:
     liveins: $rsi, $rdi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
 
   bb.1.not_null:
     liveins: $rsi, $rdi
@@ -531,7 +531,7 @@ body:             |
     $rdi  = MOV64ri 5000
     $rdi = AND64rm killed $rdi, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
     CMP64rr killed $rdi, killed $rsi, implicit-def $eflags
-    JE_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 4, implicit $eflags
 
   bb.2.ret_200:
     $eax = MOV32ri 200
@@ -563,7 +563,7 @@ body:             |
     liveins: $rsi, $rdi, $rdx
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
 
   bb.1.not_null:
     liveins: $rsi, $rdi, $rdx
@@ -572,7 +572,7 @@ body:             |
     $rbx = AND64rm killed $rbx, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load 4 from %ir.x)
     $rdx = MOV64ri 0
     CMP64rr killed $rbx, killed $rsi, implicit-def $eflags
-    JE_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 4, implicit $eflags
 
   bb.2.ret_200:
     $eax = MOV32ri 200
@@ -611,7 +611,7 @@ body:             |
     CFI_INSTRUCTION offset $rbx, -16
     $rbx = MOV64rr $rdi
     TEST64rr $rbx, $rbx, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.stay:
     liveins: $rbx
@@ -648,7 +648,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -682,7 +682,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -713,7 +713,7 @@ body:             |
     liveins: $rsi, $rdi
   
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
   
   bb.2.not_null:
     liveins: $rdi, $rsi
@@ -745,7 +745,7 @@ body:             |
     liveins: $rsi, $rdi
   
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
   
   bb.2.not_null:
     liveins: $rdi, $rsi
@@ -778,7 +778,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -808,7 +808,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -839,7 +839,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -857,7 +857,7 @@ name:            inc_store_with_dep_in_null
 # CHECK-LABEL: inc_store_with_dep_in_null
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -870,7 +870,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -892,7 +892,7 @@ name:            inc_store_with_volatile
 # CHECK-LABEL: inc_store_with_volatile
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -905,7 +905,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -922,7 +922,7 @@ name:            inc_store_with_two_dep
 # CHECK-LABEL: inc_store_with_two_dep
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -935,7 +935,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -954,7 +954,7 @@ name:            inc_store_with_redefined_base
 # CHECK-LABEL: inc_store_with_redefined_base
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -967,7 +967,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -998,7 +998,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1017,7 +1017,7 @@ name:            inc_store_across_call
 # CHECK-LABEL: inc_store_across_call
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rbx, $rbx, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1037,7 +1037,7 @@ body:             |
     CFI_INSTRUCTION offset $rbx, -16
     $rbx = MOV64rr killed $rdi
     TEST64rr $rbx, $rbx, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rbx
@@ -1059,7 +1059,7 @@ name:            inc_store_with_dep_in_dep
 # CHECK-LABEL: inc_store_with_dep_in_dep
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1072,7 +1072,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1092,7 +1092,7 @@ name:            inc_store_with_load_over_store
 # CHECK-LABEL: inc_store_with_load_over_store
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1105,7 +1105,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1124,7 +1124,7 @@ name:            inc_store_with_store_over_load
 # CHECK-LABEL: inc_store_with_store_over_load
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1137,7 +1137,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1156,7 +1156,7 @@ name:            inc_store_with_store_over_store
 # CHECK-LABEL: inc_store_with_store_over_store
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1169,7 +1169,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1200,7 +1200,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1231,7 +1231,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1250,7 +1250,7 @@ name:            inc_store_and_load_alias
 # CHECK-LABEL: inc_store_and_load_alias
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1263,7 +1263,7 @@ body:             |
     liveins: $rdi, $rsi
 
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
@@ -1282,7 +1282,7 @@ name:            inc_spill_dep
 # CHECK-LABEL: inc_spill_dep
 # CHECK: bb.0.entry:
 # CHECK:    TEST64rr $rdi, $rdi, implicit-def $eflags
-# CHECK-NEXT:    JE_1 %bb.2, implicit killed $eflags
+# CHECK-NEXT:    JCC_1 %bb.2, 4, implicit killed $eflags
 # CHECK: bb.1.not_null
 
 alignment:       4
@@ -1299,7 +1299,7 @@ body:             |
     $rsp = frame-setup SUB64ri8 $rsp, 8, implicit-def dead $eflags
     MOV32mr $rsp, 1, $noreg, 0, $noreg, $esi :: (store 4 into %stack.0)
     TEST64rr $rdi, $rdi, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
diff --git a/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir b/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
index 78d0d1401c4..97f0064c475 100644
--- a/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
+++ b/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
@@ -35,7 +35,7 @@ body:             |
     ; CHECK-LABEL: bb.0.entry
     ; CHECK-NOT: FAULTING_OP
     renamable $rdi = MOV64ri 5000
-    JE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 4, implicit $eflags
 
   bb.1.not_null:
     liveins: $rdi, $rsi
diff --git a/llvm/test/CodeGen/X86/invalid-liveness.mir b/llvm/test/CodeGen/X86/invalid-liveness.mir
index dc939a5da93..c324241805a 100644
--- a/llvm/test/CodeGen/X86/invalid-liveness.mir
+++ b/llvm/test/CodeGen/X86/invalid-liveness.mir
@@ -16,7 +16,7 @@ registers:
   - { id: 0, class: gr32 }
 body: |
   bb.0:
-    JG_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 15, implicit $eflags
     JMP_1 %bb.3
 
   bb.2:
diff --git a/llvm/test/CodeGen/X86/late-remat-update-2.mir b/llvm/test/CodeGen/X86/late-remat-update-2.mir
index c6052df62e1..5948e258867 100644
--- a/llvm/test/CodeGen/X86/late-remat-update-2.mir
+++ b/llvm/test/CodeGen/X86/late-remat-update-2.mir
@@ -38,7 +38,7 @@ body:             |
 
     %t1:gr64 = MOV64ri32 -11
     CMP64ri8 %t1, 1, implicit-def $eflags
-    JE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 4, implicit killed $eflags
     JMP_1 %bb.1
 
   bb.1:
@@ -48,7 +48,7 @@ body:             |
     %t2:gr64 = ADD64ri8 %t2, 5, implicit-def $eflags
     $rax = COPY %t2
     CMP64ri8 %t2, 1, implicit-def $eflags
-    JE_1 %bb.1, implicit killed $eflags
+    JCC_1 %bb.1, 4, implicit killed $eflags
     RET 0, $rax
 
   bb.2:
diff --git a/llvm/test/CodeGen/X86/late-remat-update.mir b/llvm/test/CodeGen/X86/late-remat-update.mir
index 9ab02747a45..31b6e7e71bc 100644
--- a/llvm/test/CodeGen/X86/late-remat-update.mir
+++ b/llvm/test/CodeGen/X86/late-remat-update.mir
@@ -79,21 +79,21 @@ body:             |
   
     INLINEASM &"", 1, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15, 12, implicit-def dead early-clobber $eflags, !3
     CMP32ri8 %0, 2, implicit-def $eflags
-    JE_1 %bb.6, implicit killed $eflags
+    JCC_1 %bb.6, 4, implicit killed $eflags
     JMP_1 %bb.2
   
   bb.2.do.body:
     successors: %bb.5(0x19999999), %bb.3(0x66666667)
   
     CMP32ri8 %0, 1, implicit-def $eflags
-    JE_1 %bb.5, implicit killed $eflags
+    JCC_1 %bb.5, 4, implicit killed $eflags
     JMP_1 %bb.3
   
   bb.3.do.body:
     successors: %bb.4(0x20000000), %bb.1(0x60000000)
   
     TEST32rr %0, %0, implicit-def $eflags
-    JNE_1 %bb.1, implicit killed $eflags
+    JCC_1 %bb.1, 5, implicit killed $eflags
     JMP_1 %bb.4
   
   bb.4.sw.bb:
diff --git a/llvm/test/CodeGen/X86/leaFixup32.mir b/llvm/test/CodeGen/X86/leaFixup32.mir
index 60767c70af2..5928575306f 100644
--- a/llvm/test/CodeGen/X86/leaFixup32.mir
+++ b/llvm/test/CodeGen/X86/leaFixup32.mir
@@ -496,7 +496,7 @@ body:             |
    
     CMP32rr   $eax, killed $ebx, implicit-def $eflags
     $ebx = LEA32r killed $eax, 4, killed $eax, 5, $noreg
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
     RETQ $ebx
   bb.1:
     liveins: $eax, $ebp, $ebx
diff --git a/llvm/test/CodeGen/X86/leaFixup64.mir b/llvm/test/CodeGen/X86/leaFixup64.mir
index 136777dee75..dccb99661f0 100644
--- a/llvm/test/CodeGen/X86/leaFixup64.mir
+++ b/llvm/test/CodeGen/X86/leaFixup64.mir
@@ -952,7 +952,7 @@ body:             |
    
     CMP64rr   $rax, killed $rbx, implicit-def $eflags
     $rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
     RETQ $ebx
   bb.1:
     liveins: $rax, $rbp, $rbx
@@ -1028,7 +1028,7 @@ body:             |
    
     CMP64rr   $rax, killed $rbx, implicit-def $eflags
     $ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg
-    JE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 4, implicit $eflags
     RETQ $ebx
   bb.1:
     liveins: $rax, $rbp, $rbx
diff --git a/llvm/test/CodeGen/X86/limit-split-cost.mir b/llvm/test/CodeGen/X86/limit-split-cost.mir
index 219ff3741a7..59c76661d0b 100644
--- a/llvm/test/CodeGen/X86/limit-split-cost.mir
+++ b/llvm/test/CodeGen/X86/limit-split-cost.mir
@@ -102,21 +102,21 @@ body:             |
   
     INLINEASM &"", 1, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15, 12, implicit-def dead early-clobber $eflags, !3
     CMP32ri8 %0, 2, implicit-def $eflags
-    JE_1 %bb.6, implicit killed $eflags
+    JCC_1 %bb.6, 4, implicit killed $eflags
     JMP_1 %bb.2
   
   bb.2.do.body:
     successors: %bb.5(0x2aaaaaab), %bb.3(0x55555555)
   
     CMP32ri8 %0, 1, implicit-def $eflags
-    JE_1 %bb.5, implicit killed $eflags
+    JCC_1 %bb.5, 4, implicit killed $eflags
     JMP_1 %bb.3
   
   bb.3.do.body:
     successors: %bb.4, %bb.7
   
     TEST32rr %0, %0, implicit-def $eflags
-    JNE_1 %bb.7, implicit killed $eflags
+    JCC_1 %bb.7, 5, implicit killed $eflags
     JMP_1 %bb.4
   
   bb.4.sw.bb:
@@ -141,7 +141,7 @@ body:             |
     successors: %bb.8(0x04000000), %bb.1(0x7c000000)
   
     CMP32mi8 %6, 1, $noreg, 0, $noreg, 5, implicit-def $eflags :: (dereferenceable load 4 from @m, !tbaa !4)
-    JNE_1 %bb.1, implicit killed $eflags
+    JCC_1 %bb.1, 5, implicit killed $eflags
     JMP_1 %bb.8
   
   bb.8.do.end:
diff --git a/llvm/test/CodeGen/X86/machine-region-info.mir b/llvm/test/CodeGen/X86/machine-region-info.mir
index e8318231884..8b3aae6a6b0 100644
--- a/llvm/test/CodeGen/X86/machine-region-info.mir
+++ b/llvm/test/CodeGen/X86/machine-region-info.mir
@@ -5,29 +5,29 @@ name:            fun
 body:             |
   bb.0:
     CMP32ri8 $edi, 40, implicit-def $eflags
-    JNE_1 %bb.7, implicit killed $eflags
+    JCC_1 %bb.7, 5, implicit killed $eflags
     JMP_1 %bb.1
 
   bb.1:
     CMP32ri8 $edi, 1, implicit-def $eflags
-    JNE_1 %bb.11, implicit killed $eflags
+    JCC_1 %bb.11, 5, implicit killed $eflags
     JMP_1 %bb.2
 
   bb.2:
     CMP32ri8 $edi, 2, implicit-def $eflags
-    JNE_1 %bb.5, implicit killed $eflags
+    JCC_1 %bb.5, 5, implicit killed $eflags
     JMP_1 %bb.3
 
   bb.3:
     CMP32ri8 $edi, 90, implicit-def $eflags
-    JNE_1 %bb.5, implicit killed $eflags
+    JCC_1 %bb.5, 5, implicit killed $eflags
     JMP_1 %bb.4
 
   bb.4:
 
   bb.5:
     CMP32ri8 $edi, 4, implicit-def $eflags
-    JNE_1 %bb.11, implicit killed $eflags
+    JCC_1 %bb.11, 5, implicit killed $eflags
     JMP_1 %bb.6
 
   bb.6:
@@ -35,14 +35,14 @@ body:             |
 
   bb.7:
     CMP32ri8 $edi, 5, implicit-def $eflags
-    JE_1 %bb.9, implicit killed $eflags
+    JCC_1 %bb.9, 4, implicit killed $eflags
     JMP_1 %bb.8
 
   bb.8:
 
   bb.9:
     CMP32ri8 $edi, 6, implicit-def $eflags
-    JE_1 %bb.11, implicit killed $eflags
+    JCC_1 %bb.11, 4, implicit killed $eflags
     JMP_1 %bb.10
 
   bb.10:
diff --git a/llvm/test/CodeGen/X86/non-value-mem-operand.mir b/llvm/test/CodeGen/X86/non-value-mem-operand.mir
index ce55db19e22..71ed79060ab 100644
--- a/llvm/test/CodeGen/X86/non-value-mem-operand.mir
+++ b/llvm/test/CodeGen/X86/non-value-mem-operand.mir
@@ -154,14 +154,14 @@ body:             |
     $rsp = frame-setup SUB64ri8 $rsp, 56, implicit-def dead $eflags

     CALL64r undef $rax, csr_64, implicit $rsp, implicit undef $rdi, implicit undef $rsi, implicit-def $rsp, implicit-def $rax

     TEST64rr $rax, $rax, implicit-def $eflags

-    JNE_1 %bb.3.bb3, implicit killed $eflags

+    JCC_1 %bb.3.bb3, 5, implicit killed $eflags

   

   bb.1.bb2:

     successors: %bb.2(0x40000000), %bb.13.bb59(0x40000000)

   

     $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags

     TEST8rr $bpl, $bpl, implicit-def $eflags

-    JE_1 %bb.13.bb59, implicit killed $eflags

+    JCC_1 %bb.13.bb59, 4, implicit killed $eflags

   

   bb.2:

     successors: %bb.12.bb51(0x80000000)

@@ -194,7 +194,7 @@ body:             |
     $ebx = MOV32rr killed $eax, implicit-def $rbx

     $r14d = MOV32rr $ebx, implicit-def $r14

     TEST8rr $sil, $sil, implicit-def $eflags

-    JNE_1 %bb.6.bb26, implicit $eflags

+    JCC_1 %bb.6.bb26, 5, implicit $eflags

   

   bb.5.bb15:

     successors: %bb.6.bb26(0x80000000)

@@ -227,7 +227,7 @@ body:             |
     $r13 = MOV64rm killed $rax, 1, $noreg, 768, $noreg :: (load 8 from %ir.tmp33)

     TEST8rr $sil, $sil, implicit-def $eflags

     $rax = IMPLICIT_DEF

-    JNE_1 %bb.8.bb37, implicit $eflags

+    JCC_1 %bb.8.bb37, 5, implicit $eflags

   

   bb.7.bb35:

     successors: %bb.8.bb37(0x80000000)

@@ -244,7 +244,7 @@ body:             |
   

     $rcx = MOV64rm killed $rax, 1, $noreg, 760, $noreg :: (load 8 from %ir.tmp40)

     CMP64rr $r13, $rcx, implicit-def $eflags

-    JL_1 %bb.10.bb37, implicit $eflags

+    JCC_1 %bb.10.bb37, 12, implicit $eflags

   

   bb.9.bb37:

     successors: %bb.10.bb37(0x80000000)

@@ -264,7 +264,7 @@ body:             |
     $ecx = MOV32ri 6

     CMP32ri $eax, 15141, implicit-def $eflags

     $xmm0 = MOVSDrm $rsp, 1, $noreg, 40, $noreg :: (load 8 from %stack.4)

-    JL_1 %bb.4.bb7, implicit $eflags

+    JCC_1 %bb.4.bb7, 12, implicit $eflags

   

   bb.11.bb51.loopexit:

     successors: %bb.12.bb51(0x80000000)

diff --git a/llvm/test/CodeGen/X86/opt_phis2.mir b/llvm/test/CodeGen/X86/opt_phis2.mir
index 55523f9ea5e..738a2da1f36 100644
--- a/llvm/test/CodeGen/X86/opt_phis2.mir
+++ b/llvm/test/CodeGen/X86/opt_phis2.mir
@@ -30,7 +30,7 @@ body:             |
     %15:gr32 = SUB32rr %7, %14, implicit-def dead $eflags
     %10:gr64_nosp = SUBREG_TO_REG 0, %15, %subreg.sub_32bit
     %16:gr32 = SUB32ri8 %15, 3, implicit-def $eflags
-    JA_1 %bb.8, implicit $eflags
+    JCC_1 %bb.8, 7, implicit $eflags
 
   bb.9:
     JMP64m $noreg, 8, %10, %jump-table.0, $noreg :: (load 8 from jump-table)
diff --git a/llvm/test/CodeGen/X86/peephole-recurrence.mir b/llvm/test/CodeGen/X86/peephole-recurrence.mir
index 81363a0a778..8067b1754e4 100644
--- a/llvm/test/CodeGen/X86/peephole-recurrence.mir
+++ b/llvm/test/CodeGen/X86/peephole-recurrence.mir
@@ -102,7 +102,7 @@ body:             |
     %0 = PHI %5, %bb.0, %3, %bb.5
     %6 = MOV32ri 1
     TEST32rr %4, %4, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
     JMP_1 %bb.2
 
   bb.2.bb3:
@@ -115,7 +115,7 @@ body:             |
 
     %1 = PHI %6, %bb.1, %7, %bb.2
     TEST32rr %1, %1, implicit-def $eflags
-    JE_1 %bb.5, implicit $eflags
+    JCC_1 %bb.5, 4, implicit $eflags
     JMP_1 %bb.4
 
   bb.4.bb6:
@@ -136,7 +136,7 @@ body:             |
     ; CHECK-SAME: %10,
     ; CHECK-SAME: %2,
     %11 = SUB32ri8 %3, 10, implicit-def $eflags
-    JL_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 12, implicit $eflags
     JMP_1 %bb.6
 
   bb.6.bb8:
@@ -186,7 +186,7 @@ body:             |
     ; CHECK: %0:gr32 = PHI %6, %bb.0, %3, %bb.5
     %7 = MOV32ri 1
     TEST32rr %4, %4, implicit-def $eflags
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
     JMP_1 %bb.2
 
   bb.2.bb3:
@@ -199,7 +199,7 @@ body:             |
 
     %1 = PHI %7, %bb.1, %8, %bb.2
     TEST32rr %1, %1, implicit-def $eflags
-    JE_1 %bb.5, implicit $eflags
+    JCC_1 %bb.5, 4, implicit $eflags
     JMP_1 %bb.4
 
   bb.4.bb6:
@@ -221,7 +221,7 @@ body:             |
     ; CHECK-SAME: %2,
     ; CHECK-SAME: %11,
     %12 = SUB32ri8 %3, 10, implicit-def $eflags
-    JL_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 12, implicit $eflags
     JMP_1 %bb.6
 
   bb.6.bb8:
diff --git a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
index f045b0b4183..442fff97a16 100644
--- a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
+++ b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
@@ -293,7 +293,7 @@ body:             |
     $rcx = OR64rr killed $rcx, killed $rsi, implicit-def dead $eflags
     $rdx = MOVSX64rm32 $rbx, 1, $noreg, 0, $noreg :: (load 4, align 8)
     TEST32mr killed $rcx, 4, killed $rdx, 0, $noreg, killed $eax, implicit-def $eflags :: (load 4)
-    JNE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 5, implicit $eflags
     JMP_1 %bb.3
 
   bb.1:
@@ -313,7 +313,7 @@ body:             |
     $eax = LEA64_32r killed $rax, 1, killed $rcx, -1, $noreg
     $eax = SAR32r1 killed $eax, implicit-def dead $eflags
     CMP32mr $rbx, 1, $noreg, 0, $noreg, killed $eax, implicit-def $eflags :: (load 4, align 8), (load 4, align 8)
-    JG_1 %bb.1, implicit killed $eflags
+    JCC_1 %bb.1, 15, implicit killed $eflags
 
   bb.3:
     liveins: $rbp
diff --git a/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir b/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
index 25e6992b7b7..6487f4851aa 100644
--- a/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
+++ b/llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
@@ -75,7 +75,7 @@ body: |
     renamable $eax = COPY $edi
     DBG_VALUE $eax, $noreg, !14, !DIExpression(), debug-location !16
     CMP32mi8 $rip, 1, $noreg, @x0, $noreg, 0, implicit-def $eflags, debug-location !16
-    JE_1 %bb.2, implicit killed $eflags, debug-location !16
+    JCC_1 %bb.2, 4, implicit killed $eflags, debug-location !16
     JMP_1 %bb.1, debug-location !16
 
   bb.1:
diff --git a/llvm/test/CodeGen/X86/pr27681.mir b/llvm/test/CodeGen/X86/pr27681.mir
index 2a6febd70e4..030b4a1d322 100644
--- a/llvm/test/CodeGen/X86/pr27681.mir
+++ b/llvm/test/CodeGen/X86/pr27681.mir
@@ -61,7 +61,7 @@ body:             |
     $cl = AND8rr killed $cl, killed $bl, implicit-def dead $eflags
     CMP32ri8 $ebp, -1, implicit-def $eflags
     $edx = MOV32ri 0
-    JE_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 4, implicit $eflags
 
   bb.2:
     liveins: $cl, $eax, $ebp, $esi
diff --git a/llvm/test/CodeGen/X86/pr38952.mir b/llvm/test/CodeGen/X86/pr38952.mir
index 57cdc017f9e..9a43dd2d8ce 100644
--- a/llvm/test/CodeGen/X86/pr38952.mir
+++ b/llvm/test/CodeGen/X86/pr38952.mir
@@ -77,7 +77,7 @@ body:             |
     renamable $eax = MOV32r0 implicit-def dead $eflags
     DBG_VALUE $ebx, $noreg, !21, !DIExpression()
     CMP32ri $edi, 255, implicit-def $eflags
-    JG_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 15, implicit killed $eflags
     JMP_1 %bb.1
   
   bb.1.if.end:
diff --git a/llvm/test/CodeGen/X86/pre-coalesce.mir b/llvm/test/CodeGen/X86/pre-coalesce.mir
index 211b3a4731b..8a783a79609 100644
--- a/llvm/test/CodeGen/X86/pre-coalesce.mir
+++ b/llvm/test/CodeGen/X86/pre-coalesce.mir
@@ -43,7 +43,7 @@
 # CHECK: [[L1:bb.3]].{{[a-zA-Z0-9.]+}}:
 # CHECK: %[[REGA:.*]] = COPY %[[REGB:.*]]
 # CHECK-NOT: %[[REGB]] = COPY %[[REGA]]
-# CHECK: JNE_1 %[[L1]]
+# CHECK: JCC_1 %[[L1]], 5
 
 name:            foo
 alignment:       4
@@ -87,7 +87,7 @@ body:             |
     %12 = MOV8rm %0, 1, $noreg, 0, $noreg :: (load 1 from %ir.t0)
     TEST8rr %12, %12, implicit-def $eflags
     %11 = MOV32rm $rip, 1, $noreg, @a, $noreg :: (dereferenceable load 4 from @a)
-    JNE_1 %bb.1, implicit killed $eflags
+    JCC_1 %bb.1, 5, implicit killed $eflags
   
   bb.4:
     %10 = COPY %11
@@ -105,7 +105,7 @@ body:             |
     %12 = MOV8rm %0, 1, $noreg, 0, $noreg :: (load 1 from %ir.t0)
     TEST8rr %12, %12, implicit-def $eflags
     %11 = COPY %10
-    JNE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 5, implicit killed $eflags
     JMP_1 %bb.3
   
   bb.3.while.end:
diff --git a/llvm/test/CodeGen/X86/regalloc-copy-hints.mir b/llvm/test/CodeGen/X86/regalloc-copy-hints.mir
index 3a5cd41b852..ce84b3b46bb 100644
--- a/llvm/test/CodeGen/X86/regalloc-copy-hints.mir
+++ b/llvm/test/CodeGen/X86/regalloc-copy-hints.mir
@@ -112,7 +112,7 @@ body:             |
   
     %13:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %13.sub_8bit, %13.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.2, implicit killed $eflags
+    JCC_1 %bb.2, 5, implicit killed $eflags
     JMP_1 %bb.1
   
   bb.1:
@@ -124,7 +124,7 @@ body:             |
   
     %15:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %15.sub_8bit, %15.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.4, implicit killed $eflags
+    JCC_1 %bb.4, 5, implicit killed $eflags
     JMP_1 %bb.3
   
   bb.3:
@@ -139,7 +139,7 @@ body:             |
     MOV32mr undef %17:gr32, 1, $noreg, 0, $noreg, %1
     %18:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %18.sub_8bit, %18.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.6, implicit killed $eflags
+    JCC_1 %bb.6, 5, implicit killed $eflags
     JMP_1 %bb.5
   
   bb.5:
@@ -151,7 +151,7 @@ body:             |
   
     %20:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %20.sub_8bit, %20.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.8, implicit killed $eflags
+    JCC_1 %bb.8, 5, implicit killed $eflags
     JMP_1 %bb.7
   
   bb.7:
@@ -163,7 +163,7 @@ body:             |
   
     %22:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %22.sub_8bit, %22.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.10, implicit killed $eflags
+    JCC_1 %bb.10, 5, implicit killed $eflags
     JMP_1 %bb.9
   
   bb.9:
@@ -175,7 +175,7 @@ body:             |
   
     %24:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %24.sub_8bit, %24.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.12, implicit killed $eflags
+    JCC_1 %bb.12, 5, implicit killed $eflags
     JMP_1 %bb.11
   
   bb.11:
@@ -187,7 +187,7 @@ body:             |
   
     %26:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %26.sub_8bit, %26.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.14, implicit killed $eflags
+    JCC_1 %bb.14, 5, implicit killed $eflags
     JMP_1 %bb.13
   
   bb.13:
@@ -198,7 +198,7 @@ body:             |
     %0:gr32 = LEA32r %12, 1, $noreg, 80, $noreg
     %28:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %28.sub_8bit, %28.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.20, implicit killed $eflags
+    JCC_1 %bb.20, 5, implicit killed $eflags
     JMP_1 %bb.15
   
   bb.15:
@@ -206,7 +206,7 @@ body:             |
   
     %78:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %78.sub_8bit, %78.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.17, implicit killed $eflags
+    JCC_1 %bb.17, 5, implicit killed $eflags
     JMP_1 %bb.16
   
   bb.16:
@@ -217,7 +217,7 @@ body:             |
     successors: %bb.18(0x7fffffff), %bb.19(0x00000001)
   
     TEST8rr %78.sub_8bit, %78.sub_8bit, implicit-def $eflags
-    JE_1 %bb.19, implicit killed $eflags
+    JCC_1 %bb.19, 4, implicit killed $eflags
   
   bb.18:
     %79:gr32 = LEA32r %12, 1, $noreg, 80, $noreg
@@ -237,7 +237,7 @@ body:             |
     %35:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %35.sub_8bit, %35.sub_8bit, implicit-def $eflags
     %80:gr32 = IMPLICIT_DEF
-    JNE_1 %bb.23, implicit killed $eflags
+    JCC_1 %bb.23, 5, implicit killed $eflags
     JMP_1 %bb.22
   
   bb.22:
@@ -257,7 +257,7 @@ body:             |
     MOV32mi %80, 1, $noreg, 52, $noreg, @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private15_preEnd__authorEv
     %39:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %39.sub_8bit, %39.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.25, implicit killed $eflags
+    JCC_1 %bb.25, 5, implicit killed $eflags
     JMP_1 %bb.24
   
   bb.24:
@@ -269,7 +269,7 @@ body:             |
   
     %41:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %41.sub_8bit, %41.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.27, implicit killed $eflags
+    JCC_1 %bb.27, 5, implicit killed $eflags
     JMP_1 %bb.26
   
   bb.26:
@@ -281,7 +281,7 @@ body:             |
   
     %43:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %43.sub_8bit, %43.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.29, implicit killed $eflags
+    JCC_1 %bb.29, 5, implicit killed $eflags
     JMP_1 %bb.28
   
   bb.28:
@@ -293,7 +293,7 @@ body:             |
   
     %45:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %45.sub_8bit, %45.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.31, implicit killed $eflags
+    JCC_1 %bb.31, 5, implicit killed $eflags
     JMP_1 %bb.30
   
   bb.30:
@@ -305,7 +305,7 @@ body:             |
   
     %47:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %47.sub_8bit, %47.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.33, implicit killed $eflags
+    JCC_1 %bb.33, 5, implicit killed $eflags
     JMP_1 %bb.32
   
   bb.32:
@@ -317,7 +317,7 @@ body:             |
   
     %49:gr8 = MOV8ri 1
     TEST8rr %49, %49, implicit-def $eflags
-    JNE_1 %bb.37, implicit killed $eflags
+    JCC_1 %bb.37, 5, implicit killed $eflags
     JMP_1 %bb.34
   
   bb.34:
@@ -325,7 +325,7 @@ body:             |
   
     %81:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %81.sub_8bit, %81.sub_8bit, implicit-def $eflags
-    JE_1 %bb.36, implicit killed $eflags
+    JCC_1 %bb.36, 4, implicit killed $eflags
   
   bb.35:
     %82:gr32 = LEA32r %12, 1, $noreg, 80, $noreg
@@ -355,7 +355,7 @@ body:             |
     MOV32mr undef %54:gr32, 1, $noreg, 0, $noreg, %1
     %55:gr32 = MOV32rm %12, 1, $noreg, 140, $noreg
     CMP32mi8 %55, 1, $noreg, 0, $noreg, 0, implicit-def $eflags
-    JE_1 %bb.40, implicit killed $eflags
+    JCC_1 %bb.40, 4, implicit killed $eflags
     JMP_1 %bb.39
   
   bb.39:
@@ -367,7 +367,7 @@ body:             |
   
     %56:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %56.sub_8bit, %56.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.42, implicit killed $eflags
+    JCC_1 %bb.42, 5, implicit killed $eflags
     JMP_1 %bb.41
   
   bb.41:
@@ -375,7 +375,7 @@ body:             |
   
     %58:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %58.sub_8bit, %58.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.43, implicit killed $eflags
+    JCC_1 %bb.43, 5, implicit killed $eflags
     JMP_1 %bb.44
   
   bb.42:
@@ -391,7 +391,7 @@ body:             |
   
     %60:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %60.sub_8bit, %60.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.46, implicit killed $eflags
+    JCC_1 %bb.46, 5, implicit killed $eflags
     JMP_1 %bb.45
   
   bb.45:
@@ -403,7 +403,7 @@ body:             |
   
     %62:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %62.sub_8bit, %62.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.48, implicit killed $eflags
+    JCC_1 %bb.48, 5, implicit killed $eflags
     JMP_1 %bb.47
   
   bb.47:
@@ -415,7 +415,7 @@ body:             |
   
     %64:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %64.sub_8bit, %64.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.50, implicit killed $eflags
+    JCC_1 %bb.50, 5, implicit killed $eflags
     JMP_1 %bb.49
   
   bb.49:
@@ -427,7 +427,7 @@ body:             |
   
     %66:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %66.sub_8bit, %66.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.52, implicit killed $eflags
+    JCC_1 %bb.52, 5, implicit killed $eflags
     JMP_1 %bb.51
   
   bb.51:
@@ -439,7 +439,7 @@ body:             |
   
     %68:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %68.sub_8bit, %68.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.54, implicit killed $eflags
+    JCC_1 %bb.54, 5, implicit killed $eflags
     JMP_1 %bb.53
   
   bb.53:
@@ -451,7 +451,7 @@ body:             |
   
     %70:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %70.sub_8bit, %70.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.56, implicit killed $eflags
+    JCC_1 %bb.56, 5, implicit killed $eflags
     JMP_1 %bb.55
   
   bb.55:
@@ -463,7 +463,7 @@ body:             |
   
     %72:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %72.sub_8bit, %72.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.58, implicit killed $eflags
+    JCC_1 %bb.58, 5, implicit killed $eflags
     JMP_1 %bb.57
   
   bb.57:
@@ -474,7 +474,7 @@ body:             |
     successors: %bb.62(0x00000001), %bb.59(0x7fffffff)
   
     CMP32mi8 %0, 1, $noreg, 0, $noreg, 0, implicit-def $eflags
-    JE_1 %bb.62, implicit killed $eflags
+    JCC_1 %bb.62, 4, implicit killed $eflags
     JMP_1 %bb.59
   
   bb.59:
@@ -483,7 +483,7 @@ body:             |
     successors: %bb.60(0x7fffffff), %bb.61(0x00000001)
   
     CMP32ri undef %75:gr32, 95406325, implicit-def $eflags
-    JB_1 %bb.61, implicit killed $eflags
+    JCC_1 %bb.61, 2, implicit killed $eflags
     JMP_1 %bb.60
   
   bb.61:
@@ -495,7 +495,7 @@ body:             |
   
     %76:gr32_abcd = MOV32r0 implicit-def dead $eflags
     TEST8rr %76.sub_8bit, %76.sub_8bit, implicit-def $eflags
-    JNE_1 %bb.64, implicit killed $eflags
+    JCC_1 %bb.64, 5, implicit killed $eflags
     JMP_1 %bb.63
   
   bb.63:
diff --git a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
index 6943033c565..c5cd254c699 100644
--- a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
+++ b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
@@ -142,7 +142,7 @@ body:             |
     DBG_VALUE %fixed-stack.0, 0, !16, !DIExpression(), debug-location !26
     DBG_VALUE %fixed-stack.1, 0, !15, !DIExpression(), debug-location !25
     CMP32rr $eax, killed $edx, implicit-def $eflags, debug-location !27
-    JL_1 %bb.4, implicit killed $eflags, debug-location !29
+    JCC_1 %bb.4, 12, implicit killed $eflags, debug-location !29
     JMP_1 %bb.1, debug-location !29
   
   bb.1.for.cond.preheader:
@@ -167,7 +167,7 @@ body:             |
     ADJCALLSTACKUP32 4, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp, debug-location !33
     $edi = INC32r killed $edi, implicit-def dead $eflags, debug-location !30
     CMP32rr $edi, $esi, implicit-def $eflags, debug-location !30
-    JL_1 %bb.2, implicit killed $eflags, debug-location !34
+    JCC_1 %bb.2, 12, implicit killed $eflags, debug-location !34
   
   bb.3:
     successors: %bb.4(0x80000000)
diff --git a/llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir b/llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir
index 6c0a7992d96..d99a7082068 100644
--- a/llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir
+++ b/llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir
@@ -3,7 +3,7 @@
 name: f
 body: |
   bb.0:
-    JB_1 %bb.2, undef implicit killed $eflags
+    JCC_1 %bb.2, 2, undef implicit killed $eflags
     JMP_1 %bb.1
 
   bb.1:
diff --git a/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll b/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll
index 76a78deeb47..70811b153ce 100644
--- a/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll
+++ b/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll
@@ -13,32 +13,32 @@ entry:
 ; CHECK: successors: %[[PEELED_CASE_LABEL:.*]](0x5999999a), %[[PEELED_SWITCH_LABEL:.*]](0x26666666)
 ; CHECK:    %[[VAL:[0-9]+]]:gr32 = COPY $edi
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18568, implicit-def $eflags
-; CHECK:    JE_1 %[[PEELED_CASE_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[PEELED_CASE_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[PEELED_SWITCH_LABEL]]
 ; CHECK:  [[PEELED_SWITCH_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[BB1_LABEL:.*]](0x0206d3a0), %[[BB2_LABEL:.*]](0x7df92c60)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18311, implicit-def $eflags
-; CHECK:    JG_1 %[[BB2_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[BB2_LABEL]], 15, implicit $eflags
 ; CHECK:    JMP_1 %[[BB1_LABEL]]
 ; CHECK:  [[BB1_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE2_LABEL:.*]](0x35e50d5b), %[[BB3_LABEL:.*]](0x4a1af2a5)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], -8826, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE2_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE2_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[BB3_LABEL]]
 ; CHECK:  [[BB3_LABEL]]
 ; CHECK:    successors: %[[CASE5_LABEL:.*]](0x45d173c8), %[[BB4_LABEL:.*]](0x3a2e8c38)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 129, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE5_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE5_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[BB4_LABEL]]
 ; CHECK:  [[BB4_LABEL:.*]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE1_LABEL:.*]](0x66666666), %[[DEFAULT_BB_LABEL:.*]](0x1999999a)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 8, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE1_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE1_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[DEFAULT_BB_LABEL]]
 ; CHECK:  [[BB2_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE3_LABEL:.*]](0x7fe44107), %[[DEFAULT_BB_LABEL]](0x001bbef9)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18312, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE3_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE3_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[DEFAULT_BB_LABEL]]
 
 bb1:
@@ -76,37 +76,37 @@ entry:
 ; CHECK:   %[[VAL:[0-9]+]]:gr32 = COPY $edi
 ; CHECK:   %{{[0-9]+}}:gr32 = ADD32ri8 %{{[0-9]+}}, -85, implicit-def dead $eflags
 ; CHECK:   %{{[0-9]+}}:gr32 = SUB32ri8 %{{[0-9]+}}, 2, implicit-def $eflags
-; CHECK:   JB_1 %[[PEELED_CASE_LABEL]], implicit $eflags
+; CHECK:   JCC_1 %[[PEELED_CASE_LABEL]], 2, implicit $eflags
 ; CHECK:   JMP_1 %[[PEELED_SWITCH_LABEL]]
 ; CHECK: [[PEELED_SWITCH_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[BB1_LABEL:.*]](0x0088888a), %[[BB2_LABEL:.*]](0x7f777776)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 4, implicit-def $eflags
-; CHECK:    JG_1 %[[BB2_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[BB2_LABEL]], 15, implicit $eflags
 ; CHECK:    JMP_1 %[[BB1_LABEL]]
 ; CHECK:  [[BB1_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE4_LABEL:.*]](0x7f775a4f), %[[BB3_LABEL:.*]](0x0088a5b1)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 1, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE4_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE4_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[BB3_LABEL]]
 ; CHECK:  [[BB3_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE1_LABEL:.*]](0x66666666), %[[DEFAULT_BB_LABEL:.*]](0x1999999a)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], -40, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE1_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE1_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[DEFAULT_BB_LABEL]]
 ; CHECK:  [[BB2_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE5_LABEL:.*]](0x00000000), %[[BB4_LABEL:.*]](0x80000000)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 5, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE5_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE5_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[BB4_LABEL]]
 ; CHECK:  [[BB4_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE6_LABEL:.*]](0x00000000), %[[BB5_LABEL:.*]](0x80000000)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 7, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE6_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE6_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[BB5_LABEL]]
 ; CHECK:  [[BB5_LABEL]].{{[a-zA-Z0-9.]+}}:
 ; CHECK:    successors: %[[CASE7_LABEL:.*]](0x00000000), %[[DEFAULT_BB_LABEL]](0x80000000)
 ; CHECK:    %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 49, implicit-def $eflags
-; CHECK:    JE_1 %[[CASE7_LABEL]], implicit $eflags
+; CHECK:    JCC_1 %[[CASE7_LABEL]], 4, implicit $eflags
 ; CHECK:    JMP_1 %[[DEFAULT_BB_LABEL]]
 
 
diff --git a/llvm/test/CodeGen/X86/tail-call-conditional.mir b/llvm/test/CodeGen/X86/tail-call-conditional.mir
index c3ac5c09c25..7d1c8d6a063 100644
--- a/llvm/test/CodeGen/X86/tail-call-conditional.mir
+++ b/llvm/test/CodeGen/X86/tail-call-conditional.mir
@@ -38,7 +38,7 @@ body:             |
 
     $rax = COPY $rdi
     CMP64ri8 $rax, 99, implicit-def $eflags
-    JA_1 %bb.4, implicit $eflags
+    JCC_1 %bb.4, 7, implicit $eflags
     JMP_1 %bb.1
 
   ; CHECK: bb.1:
@@ -55,7 +55,7 @@ body:             |
     liveins: $rax, $rsi
 
     CMP64ri8 $rax, 9, implicit-def $eflags
-    JA_1 %bb.3, implicit $eflags
+    JCC_1 %bb.3, 7, implicit $eflags
     JMP_1 %bb.2
 
   bb.2:
diff --git a/llvm/test/CodeGen/X86/tail-dup-debugloc.ll b/llvm/test/CodeGen/X86/tail-dup-debugloc.ll
index ef46ce4486f..f2539993e7a 100644
--- a/llvm/test/CodeGen/X86/tail-dup-debugloc.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-debugloc.ll
@@ -6,7 +6,7 @@
 ; CHECK: [[DLOC:![0-9]+]] = !DILocation(line: 9, column: 5, scope: !{{[0-9]+}})
 ; CHECK: [[VREG:%[^ ]+]]:gr64 = COPY $rdi
 ; CHECK: TEST64rr [[VREG]], [[VREG]]
-; CHECK-NEXT: JE_1 {{.+}}, debug-location [[DLOC]]
+; CHECK-NEXT: JCC_1 {{.+}}, debug-location [[DLOC]]
 ; CHECK-NEXT: JMP_1 {{.+}}, debug-location [[DLOC]]
 
 target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir b/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
index 29b6ead510c..67ad823f357 100644
--- a/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
+++ b/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
@@ -7,25 +7,25 @@
 # CHECK-NEXT:    successors: %bb.3(0x30000000), %bb.4(0x50000000)
 # CHECK:    $rax = MOV64rm $r14, 1, $noreg, 0, $noreg
 # CHECK-NEXT:    TEST64rr $rax, $rax
-# CHECK-NEXT:    JE_1 %bb.3
+# CHECK-NEXT:    JCC_1 %bb.3, 4
 # CHECK:  bb.4:
 # CHECK-NEXT:    successors: %bb.5(0x30000000), %bb.10(0x50000000)
 # CHECK:    CMP64mi8 killed $rax, 1, $noreg, 8, $noreg, 0
-# CHECK-NEXT:    JNE_1 %bb.10
+# CHECK-NEXT:    JCC_1 %bb.10, 5
 # CHECK:  bb.5:
 # CHECK-NEXT:    successors: %bb.6(0x30000000), %bb.7(0x50000000)
 # CHECK:    $rax = MOV64rm $r14, 1, $noreg, 0, $noreg
 # CHECK-NEXT:    TEST64rr $rax, $rax
-# CHECK-NEXT:    JE_1 %bb.6
+# CHECK-NEXT:    JCC_1 %bb.6, 4
 # CHECK:  bb.7
 # CHECK-NEXT:    successors: %bb.8(0x71555555), %bb.10(0x0eaaaaab)
 # CHECK:    CMP64mi8 killed $rax, 1, $noreg, 8, $noreg, 0
-# CHECK-NEXT:    JNE_1 %bb.10
+# CHECK-NEXT:    JCC_1 %bb.10, 5
 # CHECK:  bb.8:
 # CHECK-NEXT:    successors: %bb.9(0x04000000), %bb.7(0x7c000000)
 # CHECK:    $rax = MOV64rm $r14, 1, $noreg, 0, $noreg
 # CHECK-NEXT:    TEST64rr $rax, $rax
-# CHECK-NEXT:    JNE_1 %bb.7
+# CHECK-NEXT:    JCC_1 %bb.7, 5
 
 name:            foo
 body:             |
@@ -33,7 +33,7 @@ body:             |
     successors: %bb.1(0x40000000), %bb.7(0x40000000)
 
     TEST8ri $dl, 1, implicit-def $eflags, implicit killed $edx
-    JE_1 %bb.7, implicit $eflags
+    JCC_1 %bb.7, 4, implicit $eflags
 
   bb.1:
     successors: %bb.16(0x80000000)
@@ -46,7 +46,7 @@ body:             |
 
     $rax = MOV64rm $r14, 1, $noreg, 0, $noreg :: (load 8)
     TEST64rr $rax, $rax, implicit-def $eflags
-    JNE_1 %bb.9, implicit killed $eflags
+    JCC_1 %bb.9, 5, implicit killed $eflags
 
   bb.8:
     successors: %bb.16(0x80000000)
@@ -58,14 +58,14 @@ body:             |
     successors: %bb.10(0x30000000), %bb.15(0x50000000)
 
     CMP64mi8 killed $rax, 1, $noreg, 8, $noreg, 0, implicit-def $eflags :: (load 8)
-    JNE_1 %bb.15, implicit $eflags
+    JCC_1 %bb.15, 5, implicit $eflags
 
   bb.10:
     successors: %bb.11(0x30000000), %bb.12(0x50000000)
 
     $rax = MOV64rm $r14, 1, $noreg, 0, $noreg :: (load 8)
     TEST64rr $rax, $rax, implicit-def $eflags
-    JNE_1 %bb.12, implicit $eflags
+    JCC_1 %bb.12, 5, implicit $eflags
 
   bb.11:
     successors: %bb.16(0x80000000)
@@ -77,14 +77,14 @@ body:             |
     successors: %bb.13(0x71555555), %bb.15(0x0eaaaaab)
 
     CMP64mi8 killed $rax, 1, $noreg, 8, $noreg, 0, implicit-def $eflags :: (load 8), (load 8)
-    JNE_1 %bb.15, implicit $eflags
+    JCC_1 %bb.15, 5, implicit $eflags
 
   bb.13:
     successors: %bb.14(0x04000000), %bb.12(0x7c000000)
 
     $rax = MOV64rm $r14, 1, $noreg, 0, $noreg :: (load 8)
     TEST64rr $rax, $rax, implicit-def $eflags
-    JNE_1 %bb.12, implicit $eflags
+    JCC_1 %bb.12, 5, implicit $eflags
 
   bb.14:
     successors: %bb.16(0x80000000)
diff --git a/llvm/test/CodeGen/X86/tail-merge-debugloc.ll b/llvm/test/CodeGen/X86/tail-merge-debugloc.ll
index 3090e58b341..91f3d1b9d37 100644
--- a/llvm/test/CodeGen/X86/tail-merge-debugloc.ll
+++ b/llvm/test/CodeGen/X86/tail-merge-debugloc.ll
@@ -7,7 +7,7 @@
 ; 
 ; CHECK:      [[DLOC:![0-9]+]] = !DILocation(line: 2, column: 2, scope: !{{[0-9]+}})
 ; CHECK:      TEST64rr{{.*}}$rsi, renamable $rsi, implicit-def $eflags
-; CHECK-NEXT: JNE_1{{.*}}, debug-location [[DLOC]]
+; CHECK-NEXT: JCC_1{{.*}}, debug-location [[DLOC]]
 
 target triple = "x86_64-unknown-linux-gnu"
 
diff --git a/llvm/test/CodeGen/X86/test_x86condbr_globaladdr.mir b/llvm/test/CodeGen/X86/test_x86condbr_globaladdr.mir
index 054789b7ef6..4abe7d5e048 100644
--- a/llvm/test/CodeGen/X86/test_x86condbr_globaladdr.mir
+++ b/llvm/test/CodeGen/X86/test_x86condbr_globaladdr.mir
@@ -18,7 +18,7 @@ body: |
     %1:gr32 = COPY $edx
     %2:gr32 = MOV32rm %1:gr32, 1, $noreg, 850256, $noreg
     %3:gr32 = SUB32ri %2:gr32, @img2buf_normal, implicit-def $eflags
-    JE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 4, implicit $eflags
     JMP_1 %bb.3
 
   bb.2:
diff --git a/llvm/test/CodeGen/X86/undef-eflags.mir b/llvm/test/CodeGen/X86/undef-eflags.mir
index e5cf58bac68..beb05215764 100644
--- a/llvm/test/CodeGen/X86/undef-eflags.mir
+++ b/llvm/test/CodeGen/X86/undef-eflags.mir
@@ -7,8 +7,8 @@ name: fallundef
 tracksRegLiveness: true
 body: |
   bb.0:
-    JE_1 %bb.1, implicit undef $eflags
-    ; CHECK: JE_1 %bb.1, implicit undef $eflags
+    JCC_1 %bb.1, 4, implicit undef $eflags
+    ; CHECK: JCC_1 %bb.1, 4, implicit undef $eflags
     JMP_1 %bb.2
   bb.1:
     RET 2, undef $eax
diff --git a/llvm/test/CodeGen/X86/update-terminator-debugloc.ll b/llvm/test/CodeGen/X86/update-terminator-debugloc.ll
index 9bcac48a611..0412ba2d333 100644
--- a/llvm/test/CodeGen/X86/update-terminator-debugloc.ll
+++ b/llvm/test/CodeGen/X86/update-terminator-debugloc.ll
@@ -24,11 +24,11 @@
 ; CHECK-DAG: [[VREG1:%[^ ]+]]:gr64 = COPY $rsi
 ; CHECK-DAG: [[VREG2:%[^ ]+]]:gr64 = COPY $rdi
 ; CHECK: SUB64rr [[VREG2]], [[VREG1]]
-; CHECK-NEXT: JNE_1 {{.*}}, debug-location [[DLOC]]{{$}}
+; CHECK-NEXT: JCC_1 {{.*}}, debug-location [[DLOC]]{{$}}
 ; CHECK: [[VREG3:%[^ ]+]]:gr64 = PHI [[VREG2]]
 ; CHECK: [[VREG4:%[^ ]+]]:gr64 = nuw ADD64ri8 [[VREG3]], 4
 ; CHECK: SUB64rr [[VREG1]], [[VREG4]]
-; CHECK-NEXT: JNE_1 {{.*}}, debug-location [[DLOC]]{{$}}
+; CHECK-NEXT: JCC_1 {{.*}}, debug-location [[DLOC]]{{$}}
 ; CHECK-NEXT: JMP_1 {{.*}}, debug-location [[DLOC]]{{$}}
 
 target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/update-terminator.mir b/llvm/test/CodeGen/X86/update-terminator.mir
index 3ca52d919f1..bbb327cd2a5 100644
--- a/llvm/test/CodeGen/X86/update-terminator.mir
+++ b/llvm/test/CodeGen/X86/update-terminator.mir
@@ -48,7 +48,7 @@ body:             |
   bb.0 (%ir-block.0):
     successors: %bb.1(50), %bb.3(50)
 
-    JNE_1 %bb.1, implicit $eflags
+    JCC_1 %bb.1, 2, implicit $eflags
     JMP_1 %bb.3
   bb.1:
     successors: %bb.2(100)
@@ -56,7 +56,7 @@ body:             |
     CALL64pcrel32 @dummy1, csr_64, implicit $rsp, implicit-def $rsp
     CALL64pcrel32 @dummy1, csr_64, implicit $rsp, implicit-def $rsp
     CALL64pcrel32 @dummy1, csr_64, implicit $rsp, implicit-def $rsp
-    JNE_1 %bb.2, implicit $eflags
+    JCC_1 %bb.2, 5, implicit $eflags
 
   bb.2:
     successors: %bb.4(100)
diff --git a/llvm/test/CodeGen/X86/xor-combine-debugloc.ll b/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
index 78a2712a53b..3978378d557 100644
--- a/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
+++ b/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
@@ -10,7 +10,7 @@
 ; CHECK-DAG:  [[VREG1:%[^ ]+]]:gr32 = COPY $esi
 ; CHECK-DAG:  [[VREG2:%[^ ]+]]:gr32 = COPY $edi
 ; CHECK:      SUB32rr [[VREG2]], [[VREG1]], implicit-def $eflags, debug-location [[DLOC1]]
-; CHECK-NEXT: JE_1{{.*}} implicit $eflags, debug-location [[DLOC2]]
+; CHECK-NEXT: JCC_1{{.*}} 4, implicit $eflags, debug-location [[DLOC2]]
 ; CHECK-NEXT: JMP_1{{.*}} debug-location [[DLOC2]]
 
 target triple = "x86_64-unknown-linux-gnu"