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| author | Gadi Haber <gadi.haber@intel.com> | 2017-06-27 15:05:13 +0000 |
|---|---|---|
| committer | Gadi Haber <gadi.haber@intel.com> | 2017-06-27 15:05:13 +0000 |
| commit | 13759a7ed62a362bc3d7455da8b96279e545cdc6 (patch) | |
| tree | 2090b37ec2372cd62bbda9fca89ec5c157b44be7 /llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll | |
| parent | a179d25b99fec680d2430a07b6a35254c548e298 (diff) | |
| download | bcm5719-llvm-13759a7ed62a362bc3d7455da8b96279e545cdc6.tar.gz bcm5719-llvm-13759a7ed62a362bc3d7455da8b96279e545cdc6.zip | |
Updated and extended the information about each instruction in HSW and SNB to include the following data:
•static latency
•number of uOps from which the instructions consists
•all ports used by the instruction
Reviewers:
RKSimon
zvi
aymanmus
m_zuckerman
Differential Revision: https://reviews.llvm.org/D33897
llvm-svn: 306414
Diffstat (limited to 'llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll b/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll index a6d6ca15530..21b06915182 100644 --- a/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll +++ b/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll @@ -453,10 +453,10 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c, <32 x i8> %d) { ; SSE2-SSSE3-NEXT: pcmpgtb %xmm2, %xmm0 ; SSE2-SSSE3-NEXT: pcmpgtb %xmm3, %xmm1 ; SSE2-SSSE3-NEXT: pcmpgtb %xmm6, %xmm4 -; SSE2-SSSE3-NEXT: pand %xmm0, %xmm4 ; SSE2-SSSE3-NEXT: pcmpgtb %xmm7, %xmm5 ; SSE2-SSSE3-NEXT: pand %xmm1, %xmm5 ; SSE2-SSSE3-NEXT: movdqa %xmm5, -{{[0-9]+}}(%rsp) +; SSE2-SSSE3-NEXT: pand %xmm0, %xmm4 ; SSE2-SSSE3-NEXT: movdqa %xmm4, -{{[0-9]+}}(%rsp) ; SSE2-SSSE3-NEXT: movb -{{[0-9]+}}(%rsp), %al ; SSE2-SSSE3-NEXT: andb $1, %al |
