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author | Craig Topper <craig.topper@intel.com> | 2017-07-31 17:35:44 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-07-31 17:35:44 +0000 |
commit | cb0e74975a516d1fbc83e674c36e4cca3fee7731 (patch) | |
tree | cdb0c6e1ea2ac97a840ff0ee08c7f7594e21c33f /llvm/test/CodeGen/X86/avx512-insert-extract.ll | |
parent | ed99e4c5b2b881ec906e748dbd579d7ee75bc6eb (diff) | |
download | bcm5719-llvm-cb0e74975a516d1fbc83e674c36e4cca3fee7731.tar.gz bcm5719-llvm-cb0e74975a516d1fbc83e674c36e4cca3fee7731.zip |
[AVX-512] Remove patterns that select vmovdqu8/16 for unmasked loads. Prefer vmovdqa64/vmovdqu64 instead.
These were taking priority over the aligned load instructions since there is no vmovda8/16. I don't think there is really a difference between aligned and unaligned on newer cpus so I don't think it matters which instructions we use.
But with this change we reduce the size of the isel table a little and we allow the aligned information to pass through to the evex->vec pass and produce the same output has avx/avx2 in some cases.
I also generally dislike patterns rooted in a bitcast which these were.
Differential Revision: https://reviews.llvm.org/D35977
llvm-svn: 309589
Diffstat (limited to 'llvm/test/CodeGen/X86/avx512-insert-extract.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/avx512-insert-extract.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract.ll b/llvm/test/CodeGen/X86/avx512-insert-extract.ll index e74e40931c6..c22b960ec46 100644 --- a/llvm/test/CodeGen/X86/avx512-insert-extract.ll +++ b/llvm/test/CodeGen/X86/avx512-insert-extract.ll @@ -1295,7 +1295,7 @@ define i32 @test_insertelement_v32i1(i32 %a, i32 %b, <32 x i32> %x , <32 x i32> ; SKX-NEXT: vpmovm2w %k0, %zmm0 ; SKX-NEXT: kmovd %eax, %k0 ; SKX-NEXT: vpmovm2w %k0, %zmm1 -; SKX-NEXT: vmovdqu16 {{.*#+}} zmm2 = [0,1,2,3,32,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31] +; SKX-NEXT: vmovdqa64 {{.*#+}} zmm2 = [0,1,2,3,32,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31] ; SKX-NEXT: vpermi2w %zmm1, %zmm0, %zmm2 ; SKX-NEXT: vpmovw2m %zmm2, %k0 ; SKX-NEXT: kmovd %k0, %eax |