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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-08-17 22:12:20 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-08-17 22:12:20 +0000
commit1a87fcb9ba5189dc1702140eb3e152d6aa1d66e5 (patch)
tree9401cb99518c56036188c91a74e5fd50340d2b5a /llvm/test/CodeGen/X86/avx-shift.ll
parent5500ef27be0b033bef6bd0703be4807d61df0f70 (diff)
downloadbcm5719-llvm-1a87fcb9ba5189dc1702140eb3e152d6aa1d66e5.tar.gz
bcm5719-llvm-1a87fcb9ba5189dc1702140eb3e152d6aa1d66e5.zip
Fix PR10688. Add support for spliting 256-bit vector shifts when the
shift amount is variable llvm-svn: 137885
Diffstat (limited to 'llvm/test/CodeGen/X86/avx-shift.ll')
-rw-r--r--llvm/test/CodeGen/X86/avx-shift.ll11
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx-shift.ll b/llvm/test/CodeGen/X86/avx-shift.ll
index 791194fc1c7..3ea39a2358e 100644
--- a/llvm/test/CodeGen/X86/avx-shift.ll
+++ b/llvm/test/CodeGen/X86/avx-shift.ll
@@ -62,3 +62,14 @@ define <16 x i16> @vshift07(<16 x i16> %a) nounwind readnone {
ret <16 x i16> %s
}
+;;; Support variable shifts
+; CHECK: _vshift08
+; CHECK: vextractf128 $1
+; CHECK: vpslld $23
+; CHECK: vextractf128 $1
+; CHECK: vpslld $23
+define <8 x i32> @vshift08(<8 x i32> %a) nounwind {
+ %bitop = shl <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, %a
+ ret <8 x i32> %bitop
+}
+
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