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authorDan Gohman <dan433584@gmail.com>2015-12-25 00:31:02 +0000
committerDan Gohman <dan433584@gmail.com>2015-12-25 00:31:02 +0000
commit8887d1faedb890defbeee4f849a6a9a22bda4af5 (patch)
tree9159cca49461127efe975f761adbaf3e9a225e0b /llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
parent99d235329f0e26bd0a3df51069b91e84289ca31b (diff)
downloadbcm5719-llvm-8887d1faedb890defbeee4f849a6a9a22bda4af5.tar.gz
bcm5719-llvm-8887d1faedb890defbeee4f849a6a9a22bda4af5.zip
[WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.
Move RegStackify after coalescing and teach it to use LiveIntervals instead of depending on SSA form. This avoids a problem where a register in a COPY instruction is stackified and then subsequently coalesced with a register that is not stackified. This also puts it after the scheduler, which allows us to simplify the EXPR_STACK constraint, as we no longer have instructions being reordered after stackification and before coloring. llvm-svn: 256402
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/cfg-stackify.ll')
-rw-r--r--llvm/test/CodeGen/WebAssembly/cfg-stackify.ll14
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
index a10fb614909..71f3551347b 100644
--- a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
@@ -464,7 +464,7 @@ if.end:
; CHECK: block BB13_8{{$}}
; CHECK-NEXT: block BB13_7{{$}}
; CHECK-NEXT: block BB13_4{{$}}
-; CHECK-NEXT: br_if $pop{{[0-9]*}}, BB13_4{{$}}
+; CHECK: br_if $pop{{[0-9]*}}, BB13_4{{$}}
; CHECK-NEXT: block BB13_3{{$}}
; CHECK: br_if $pop{{[0-9]*}}, BB13_3{{$}}
; CHECK: br_if $pop{{[0-9]*}}, BB13_7{{$}}
@@ -483,7 +483,7 @@ if.end:
; OPT: block BB13_8{{$}}
; OPT-NEXT: block BB13_7{{$}}
; OPT-NEXT: block BB13_4{{$}}
-; OPT-NEXT: br_if $pop{{[0-9]*}}, BB13_4{{$}}
+; OPT: br_if $pop{{[0-9]*}}, BB13_4{{$}}
; OPT-NEXT: block BB13_3{{$}}
; OPT: br_if $pop{{[0-9]*}}, BB13_3{{$}}
; OPT: br_if $pop{{[0-9]*}}, BB13_7{{$}}
@@ -642,7 +642,7 @@ second:
; CHECK-NEXT: loop BB16_5{{$}}
; CHECK-NOT: block
; CHECK: block BB16_4{{$}}
-; CHECK-NEXT: br_if {{[^,]*}}, BB16_4{{$}}
+; CHECK: br_if {{[^,]*}}, BB16_4{{$}}
; CHECK-NOT: block
; CHECK: br_if {{[^,]*}}, BB16_1{{$}}
; CHECK-NOT: block
@@ -907,7 +907,7 @@ bb6:
; CHECK-NEXT: br_if {{[^,]*}}, BB20_4{{$}}
; CHECK-NOT: block
; CHECK: block BB20_3{{$}}
-; CHECK-NEXT: br_if {{[^,]*}}, BB20_3{{$}}
+; CHECK: br_if {{[^,]*}}, BB20_3{{$}}
; CHECK-NOT: block
; CHECK: br_if {{[^,]*}}, BB20_6{{$}}
; CHECK-NEXT: BB20_3:
@@ -933,7 +933,7 @@ bb6:
; OPT-NEXT: br_if $0, BB20_4{{$}}
; OPT-NOT: block
; OPT: block BB20_3{{$}}
-; OPT-NEXT: br_if $0, BB20_3{{$}}
+; OPT: br_if $0, BB20_3{{$}}
; OPT-NOT: block
; OPT: br_if $0, BB20_8{{$}}
; OPT-NEXT: BB20_3:
@@ -991,7 +991,7 @@ bb8:
; CHECK: block BB21_7{{$}}
; CHECK-NEXT: block BB21_6{{$}}
; CHECK-NEXT: block BB21_4{{$}}
-; CHECK-NEXT: br_if {{[^,]*}}, BB21_4{{$}}
+; CHECK: br_if {{[^,]*}}, BB21_4{{$}}
; CHECK-NOT: block
; CHECK: br_if {{[^,]*}}, BB21_7{{$}}
; CHECK-NOT: block
@@ -1015,7 +1015,7 @@ bb8:
; OPT: block BB21_7{{$}}
; OPT-NEXT: block BB21_6{{$}}
; OPT-NEXT: block BB21_4{{$}}
-; OPT-NEXT: br_if {{[^,]*}}, BB21_4{{$}}
+; OPT: br_if {{[^,]*}}, BB21_4{{$}}
; OPT-NOT: block
; OPT: br_if {{[^,]*}}, BB21_7{{$}}
; OPT-NOT: block
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