[ARM] Materialise some boolean values to avoid a branch

This patch combines some cases of ARMISD::CMOV for integers that arise in comparisons of the form

  a != b ? x : 0
  a == b ? 0 : x

and that currently (e.g. in Thumb1) are emitted as branches.

Differential Revision: https://reviews.llvm.org/D34515

llvm-svn: 325323

8 files changed, 234 insertions, 90 deletions

diff --git a/llvm/test/CodeGen/Thumb2/float-cmp.ll b/llvm/test/CodeGen/Thumb2/float-cmp.ll
index 834812cddd6..87d6ad36531 100644
--- a/llvm/test/CodeGen/Thumb2/float-cmp.ll
+++ b/llvm/test/CodeGen/Thumb2/float-cmp.ll
@@ -69,7 +69,8 @@ define i1 @cmp_f_ord(float %a, float %b) {
 ; HARD: movvc r0, #1
   %1 = fcmp ord float %a, %b
   ret i1 %1
-}define i1 @cmp_f_ueq(float %a, float %b) {
+}
+define i1 @cmp_f_ueq(float %a, float %b) {
 ; CHECK-LABEL: cmp_f_ueq:
 ; NONE: bl __aeabi_fcmpeq
 ; NONE: bl __aeabi_fcmpun
@@ -82,8 +83,8 @@ define i1 @cmp_f_ord(float %a, float %b) {
 define i1 @cmp_f_ugt(float %a, float %b) {
 ; CHECK-LABEL: cmp_f_ugt:
 ; NONE: bl __aeabi_fcmple
-; NONE: cmp r0, #0
-; NONE-NEXT: it eq
+; NONE-NEXT: clz r0, r0
+; NONE-NEXT: lsrs r0, r0, #5
 ; HARD: vcmpe.f32
 ; HARD: movhi r0, #1
   %1 = fcmp ugt float %a, %b
@@ -92,8 +93,8 @@ define i1 @cmp_f_ugt(float %a, float %b) {
 define i1 @cmp_f_uge(float %a, float %b) {
 ; CHECK-LABEL: cmp_f_uge:
 ; NONE: bl __aeabi_fcmplt
-; NONE: cmp r0, #0
-; NONE-NEXT: it eq
+; NONE-NEXT: clz r0, r0
+; NONE-NEXT: lsrs r0, r0, #5
 ; HARD: vcmpe.f32
 ; HARD: movpl r0, #1
   %1 = fcmp uge float %a, %b
@@ -102,8 +103,8 @@ define i1 @cmp_f_uge(float %a, float %b) {
 define i1 @cmp_f_ult(float %a, float %b) {
 ; CHECK-LABEL: cmp_f_ult:
 ; NONE: bl __aeabi_fcmpge
-; NONE: cmp r0, #0
-; NONE-NEXT: it eq
+; NONE-NEXT: clz r0, r0
+; NONE-NEXT: lsrs r0, r0, #5
 ; HARD: vcmpe.f32
 ; HARD: movlt r0, #1
   %1 = fcmp ult float %a, %b
@@ -112,8 +113,8 @@ define i1 @cmp_f_ult(float %a, float %b) {
 define i1 @cmp_f_ule(float %a, float %b) {
 ; CHECK-LABEL: cmp_f_ule:
 ; NONE: bl __aeabi_fcmpgt
-; NONE: cmp r0, #0
-; NONE-NEXT: it eq
+; NONE-NEXT: clz r0, r0
+; NONE-NEXT: lsrs r0, r0, #5
 ; HARD: vcmpe.f32
 ; HARD: movle r0, #1
   %1 = fcmp ule float %a, %b
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-cmn.ll b/llvm/test/CodeGen/Thumb2/thumb2-cmn.ll
index 0f361d75e52..868ca733318 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-cmn.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-cmn.ll
@@ -3,72 +3,80 @@
 ; These tests could be improved by 'movs r0, #0' being rematerialized below the
 ; test as 'mov.w r0, #0'.
 
-define i1 @f1(i32 %a, i32 %b) {
+define i32 @f1(i32 %a, i32 %b) {
     %nb = sub i32 0, %b
     %tmp = icmp ne i32 %a, %nb
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f1:
 ; CHECK: 	cmn	{{.*}}, r1
 
-define i1 @f2(i32 %a, i32 %b) {
+define i32 @f2(i32 %a, i32 %b) {
     %nb = sub i32 0, %b
     %tmp = icmp ne i32 %nb, %a
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f2:
 ; CHECK: 	cmn	{{.*}}, r1
 
-define i1 @f3(i32 %a, i32 %b) {
+define i32 @f3(i32 %a, i32 %b) {
     %nb = sub i32 0, %b
     %tmp = icmp eq i32 %a, %nb
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f3:
 ; CHECK: 	cmn	{{.*}}, r1
 
-define i1 @f4(i32 %a, i32 %b) {
+define i32 @f4(i32 %a, i32 %b) {
     %nb = sub i32 0, %b
     %tmp = icmp eq i32 %nb, %a
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f4:
 ; CHECK: 	cmn	{{.*}}, r1
 
-define i1 @f5(i32 %a, i32 %b) {
+define i32 @f5(i32 %a, i32 %b) {
     %tmp = shl i32 %b, 5
     %nb = sub i32 0, %tmp
     %tmp1 = icmp eq i32 %nb, %a
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f5:
 ; CHECK: 	cmn.w	{{.*}}, r1, lsl #5
 
-define i1 @f6(i32 %a, i32 %b) {
+define i32 @f6(i32 %a, i32 %b) {
     %tmp = lshr i32 %b, 6
     %nb = sub i32 0, %tmp
     %tmp1 = icmp ne i32 %nb, %a
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f6:
 ; CHECK: 	cmn.w	{{.*}}, r1, lsr #6
 
-define i1 @f7(i32 %a, i32 %b) {
+define i32 @f7(i32 %a, i32 %b) {
     %tmp = ashr i32 %b, 7
     %nb = sub i32 0, %tmp
     %tmp1 = icmp eq i32 %a, %nb
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f7:
 ; CHECK: 	cmn.w	{{.*}}, r1, asr #7
 
-define i1 @f8(i32 %a, i32 %b) {
+define i32 @f8(i32 %a, i32 %b) {
     %l8 = shl i32 %a, 24
     %r8 = lshr i32 %a, 8
     %tmp = or i32 %l8, %r8
     %nb = sub i32 0, %tmp
     %tmp1 = icmp ne i32 %a, %nb
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f8:
 ; CHECK: 	cmn.w	{{.*}}, {{.*}}, ror #8
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll b/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll
index fbec7f34a77..83195aeb0bc 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-cmn2.ll
@@ -1,33 +1,37 @@
 ; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
 
 ; -0x000000bb = 4294967109
-define i1 @f1(i32 %a) {
+define i32 @f1(i32 %a) {
 ; CHECK-LABEL: f1:
 ; CHECK: adds {{r.*}}, #187
     %tmp = icmp ne i32 %a, 4294967109
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; -0x00aa00aa = 4283826006
-define i1 @f2(i32 %a) {
+define i32 @f2(i32 %a) {
 ; CHECK-LABEL: f2:
 ; CHECK: cmn.w {{r.*}}, #11141290
     %tmp = icmp eq i32 %a, 4283826006
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; -0xcc00cc00 = 872363008
-define i1 @f3(i32 %a) {
+define i32 @f3(i32 %a) {
 ; CHECK-LABEL: f3:
 ; CHECK: cmn.w {{r.*}}, #-872363008
     %tmp = icmp ne i32 %a, 872363008
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; -0x00110000 = 4293853184
-define i1 @f4(i32 %a) {
+define i32 @f4(i32 %a) {
 ; CHECK-LABEL: f4:
 ; CHECK: cmn.w {{r.*}}, #1114112
     %tmp = icmp eq i32 %a, 4293853184
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-cmp.ll b/llvm/test/CodeGen/Thumb2/thumb2-cmp.ll
index 8f08617125c..2f8d725265b 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-cmp.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-cmp.ll
@@ -4,43 +4,48 @@
 ; test as 'mov.w r0, #0'.
 
 ; 0x000000bb = 187
-define i1 @f1(i32 %a) {
+define i32 @f1(i32 %a) {
 ; CHECK-LABEL: f1:
 ; CHECK: cmp {{.*}}, #187
     %tmp = icmp ne i32 %a, 187
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; 0x00aa00aa = 11141290
-define i1 @f2(i32 %a) {
+define i32 @f2(i32 %a) {
 ; CHECK-LABEL: f2:
 ; CHECK: cmp.w {{.*}}, #11141290
     %tmp = icmp eq i32 %a, 11141290 
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; 0xcc00cc00 = 3422604288
-define i1 @f3(i32 %a) {
+define i32 @f3(i32 %a) {
 ; CHECK-LABEL: f3:
 ; CHECK: cmp.w {{.*}}, #-872363008
     %tmp = icmp ne i32 %a, 3422604288
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; 0xdddddddd = 3722304989
-define i1 @f4(i32 %a) {
+define i32 @f4(i32 %a) {
 ; CHECK-LABEL: f4:
 ; CHECK: cmp.w {{.*}}, #-572662307
     %tmp = icmp ne i32 %a, 3722304989
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; 0x00110000 = 1114112
-define i1 @f5(i32 %a) {
+define i32 @f5(i32 %a) {
 ; CHECK-LABEL: f5:
 ; CHECK: cmp.w {{.*}}, #1114112
     %tmp = icmp eq i32 %a, 1114112
-    ret i1 %tmp
+    %ret = select i1 %tmp, i32 42, i32 24
+    ret i32 %ret
 }
 
 ; Check that we don't do an invalid (a > b) --> !(a < b + 1) transform.
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-teq.ll b/llvm/test/CodeGen/Thumb2/thumb2-teq.ll
index 258b7e48af8..5983be95cc6 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-teq.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-teq.ll
@@ -4,54 +4,107 @@
 ; test as 'mov.w r0, #0'.
 
 ; 0x000000bb = 187
-define i1 @f2(i32 %a) {
+define i32 @f2(i32 %a) {
     %tmp = xor i32 %a, 187
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f2:
 ; CHECK: 	teq.w	{{.*}}, #187
 
 ; 0x00aa00aa = 11141290
-define i1 @f3(i32 %a) {
+define i32 @f3(i32 %a) {
     %tmp = xor i32 %a, 11141290 
     %tmp1 = icmp eq i32 %tmp, 0
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f3:
 ; CHECK: 	teq.w	{{.*}}, #11141290
 
 ; 0xcc00cc00 = 3422604288
-define i1 @f6(i32 %a) {
+define i32 @f6(i32 %a) {
     %tmp = xor i32 %a, 3422604288
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f6:
 ; CHECK: 	teq.w	{{.*}}, #-872363008
 
 ; 0xdddddddd = 3722304989
-define i1 @f7(i32 %a) {
+define i32 @f7(i32 %a) {
     %tmp = xor i32 %a, 3722304989
     %tmp1 = icmp eq i32 %tmp, 0
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f7:
 ; CHECK: 	teq.w	{{.*}}, #-572662307
 
+; 0x00110000 = 1114112
+define i32 @f10(i32 %a) {
+    %tmp = xor i32 %a, 1114112
+    %tmp1 = icmp eq i32 0, %tmp
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
+}
+; CHECK-LABEL: f10:
+; CHECK: 	teq.w	{{.*}}, #1114112
+
+; 0x000000bb = 187
+define i1 @f12(i32 %a) {
+    %tmp = xor i32 %a, 187
+    %tmp1 = icmp eq i32 0, %tmp
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f12:
+; CHECK:      eor r0, r0, #187
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
+; 0x00aa00aa = 11141290
+define i1 @f13(i32 %a) {
+    %tmp = xor i32 %a, 11141290 
+    %tmp1 = icmp eq i32 %tmp, 0
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f13:
+; CHECK:      eor r0, r0, #11141290
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
+; 0xcc00cc00 = 3422604288
+define i1 @f16(i32 %a) {
+    %tmp = xor i32 %a, 3422604288
+    %tmp1 = icmp eq i32 0, %tmp
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f16:
+; CHECK:      eor r0, r0, #-872363008
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
 ; 0xdddddddd = 3722304989
-define i1 @f8(i32 %a) {
+define i1 @f17(i32 %a) {
     %tmp = xor i32 %a, 3722304989
-    %tmp1 = icmp ne i32 0, %tmp
+    %tmp1 = icmp eq i32 %tmp, 0
     ret i1 %tmp1
 }
+; CHECK-LABEL: f17:
+; CHECK:      eor r0, r0, #-572662307
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
 
 ; 0x00110000 = 1114112
-define i1 @f10(i32 %a) {
+define i1 @f18(i32 %a) {
     %tmp = xor i32 %a, 1114112
     %tmp1 = icmp eq i32 0, %tmp
     ret i1 %tmp1
 }
-; CHECK-LABEL: f10:
-; CHECK: 	teq.w	{{.*}}, #1114112
+; CHECK-LABEL: f18:
+; CHECK:      eor r0, r0, #1114112
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
 
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-teq2.ll b/llvm/test/CodeGen/Thumb2/thumb2-teq2.ll
index 3b4970b8784..22bde879549 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-teq2.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-teq2.ll
@@ -3,50 +3,55 @@
 ; These tests would be improved by 'movs r0, #0' being rematerialized below the
 ; tst as 'mov.w r0, #0'.
 
-define i1 @f2(i32 %a, i32 %b) {
+define i32 @f2(i32 %a, i32 %b) {
 ; CHECK: f2
 ; CHECK: teq.w {{.*}}, r1
     %tmp = xor i32 %a, %b
     %tmp1 = icmp eq i32 %tmp, 0
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f4(i32 %a, i32 %b) {
+define i32 @f4(i32 %a, i32 %b) {
 ; CHECK: f4
 ; CHECK: teq.w  {{.*}}, r1
     %tmp = xor i32 %a, %b
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f6(i32 %a, i32 %b) {
+define i32 @f6(i32 %a, i32 %b) {
 ; CHECK: f6
 ; CHECK: teq.w  {{.*}}, r1, lsl #5
     %tmp = shl i32 %b, 5
     %tmp1 = xor i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f7(i32 %a, i32 %b) {
+define i32 @f7(i32 %a, i32 %b) {
 ; CHECK: f7
 ; CHECK: teq.w  {{.*}}, r1, lsr #6
     %tmp = lshr i32 %b, 6
     %tmp1 = xor i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f8(i32 %a, i32 %b) {
+define i32 @f8(i32 %a, i32 %b) {
 ; CHECK: f8
 ; CHECK: teq.w  {{.*}}, r1, asr #7
     %tmp = ashr i32 %b, 7
     %tmp1 = xor i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f9(i32 %a, i32 %b) {
+define i32 @f9(i32 %a, i32 %b) {
 ; CHECK: f9
 ; CHECK: teq.w  {{.*}}, {{.*}}, ror #8
     %l8 = shl i32 %a, 24
@@ -54,5 +59,6 @@ define i1 @f9(i32 %a, i32 %b) {
     %tmp = or i32 %l8, %r8
     %tmp1 = xor i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-tst.ll b/llvm/test/CodeGen/Thumb2/thumb2-tst.ll
index 8cf6f144a1f..eb82f9a8c96 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-tst.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-tst.ll
@@ -4,46 +4,107 @@
 ; tst as 'mov.w r0, #0'.
 
 ; 0x000000bb = 187
-define i1 @f2(i32 %a) {
+define i32 @f2(i32 %a) {
     %tmp = and i32 %a, 187
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f2:
 ; CHECK: 	tst.w	{{.*}}, #187
 
 ; 0x00aa00aa = 11141290
-define i1 @f3(i32 %a) {
+define i32 @f3(i32 %a) {
     %tmp = and i32 %a, 11141290 
     %tmp1 = icmp eq i32 %tmp, 0
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f3:
 ; CHECK: 	tst.w	{{.*}}, #11141290
 
 ; 0xcc00cc00 = 3422604288
-define i1 @f6(i32 %a) {
+define i32 @f6(i32 %a) {
     %tmp = and i32 %a, 3422604288
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f6:
 ; CHECK: 	tst.w	{{.*}}, #-872363008
 
 ; 0xdddddddd = 3722304989
-define i1 @f7(i32 %a) {
+define i32 @f7(i32 %a) {
     %tmp = and i32 %a, 3722304989
     %tmp1 = icmp eq i32 %tmp, 0
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f7:
 ; CHECK: 	tst.w	{{.*}}, #-572662307
 
 ; 0x00110000 = 1114112
-define i1 @f10(i32 %a) {
+define i32 @f10(i32 %a) {
     %tmp = and i32 %a, 1114112
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 ; CHECK-LABEL: f10:
 ; CHECK: 	tst.w	{{.*}}, #1114112
+
+; 0x000000bb = 187
+define i1 @f12(i32 %a) {
+    %tmp = and i32 %a, 187
+    %tmp1 = icmp eq i32 0, %tmp
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f12:
+; CHECK: 	  and r0, r0, #187
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
+; 0x00aa00aa = 11141290
+define i1 @f13(i32 %a) {
+    %tmp = and i32 %a, 11141290
+    %tmp1 = icmp eq i32 %tmp, 0
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f13:
+; CHECK: 	  and r0, r0, #11141290
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
+; 0xcc00cc00 = 3422604288
+define i1 @f16(i32 %a) {
+    %tmp = and i32 %a, 3422604288
+    %tmp1 = icmp eq i32 0, %tmp
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f16:
+; CHECK: 	  and r0, r0, #-872363008
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
+; 0xdddddddd = 3722304989
+define i1 @f17(i32 %a) {
+    %tmp = and i32 %a, 3722304989
+    %tmp1 = icmp eq i32 %tmp, 0
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f17:
+; CHECK: 	  bic r0, r0, #572662306
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
+; 0x00110000 = 1114112
+define i1 @f18(i32 %a) {
+    %tmp = and i32 %a, 1114112
+    %tmp1 = icmp eq i32 0, %tmp
+    ret i1 %tmp1
+}
+; CHECK-LABEL: f18:
+; CHECK: 	  and r0, r0, #1114112
+; CHECK-NEXT: clz r0, r0
+; CHECK-NEXT: lsrs r0, r0, #5
+
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-tst2.ll b/llvm/test/CodeGen/Thumb2/thumb2-tst2.ll
index 178a2a5f329..5bde8086c44 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-tst2.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-tst2.ll
@@ -3,50 +3,55 @@
 ; These tests would be improved by 'movs r0, #0' being rematerialized below the
 ; tst as 'mov.w r0, #0'.
 
-define i1 @f2(i32 %a, i32 %b) {
+define i32 @f2(i32 %a, i32 %b) {
 ; CHECK-LABEL: f2:
 ; CHECK: tst {{.*}}, r1
     %tmp = and i32 %a, %b
     %tmp1 = icmp eq i32 %tmp, 0
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f4(i32 %a, i32 %b) {
+define i32 @f4(i32 %a, i32 %b) {
 ; CHECK-LABEL: f4:
 ; CHECK: tst {{.*}}, r1
     %tmp = and i32 %a, %b
     %tmp1 = icmp eq i32 0, %tmp
-    ret i1 %tmp1
+    %ret = select i1 %tmp1, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f6(i32 %a, i32 %b) {
+define i32 @f6(i32 %a, i32 %b) {
 ; CHECK-LABEL: f6:
 ; CHECK: tst.w {{.*}}, r1, lsl #5
     %tmp = shl i32 %b, 5
     %tmp1 = and i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f7(i32 %a, i32 %b) {
+define i32 @f7(i32 %a, i32 %b) {
 ; CHECK-LABEL: f7:
 ; CHECK: tst.w {{.*}}, r1, lsr #6
     %tmp = lshr i32 %b, 6
     %tmp1 = and i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f8(i32 %a, i32 %b) {
+define i32 @f8(i32 %a, i32 %b) {
 ; CHECK-LABEL: f8:
 ; CHECK: tst.w {{.*}}, r1, asr #7
     %tmp = ashr i32 %b, 7
     %tmp1 = and i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }
 
-define i1 @f9(i32 %a, i32 %b) {
+define i32 @f9(i32 %a, i32 %b) {
 ; CHECK-LABEL: f9:
 ; CHECK: tst.w {{.*}}, {{.*}}, ror #8
     %l8 = shl i32 %a, 24
@@ -54,5 +59,6 @@ define i1 @f9(i32 %a, i32 %b) {
     %tmp = or i32 %l8, %r8
     %tmp1 = and i32 %a, %tmp
     %tmp2 = icmp eq i32 %tmp1, 0
-    ret i1 %tmp2
+    %ret = select i1 %tmp2, i32 42, i32 24
+    ret i32 %ret
 }