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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-12-20 22:15:04 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-12-20 22:15:04 +0000
commitb95c102c2f00f69f53243f4fe310744d48307439 (patch)
tree396ca542066fc2307d3019897eb0ed5f1aa09238 /llvm/test/CodeGen/Thumb2
parent14468c6cb6a87d45aad38722f55f586a804b57e0 (diff)
downloadbcm5719-llvm-b95c102c2f00f69f53243f4fe310744d48307439.tar.gz
bcm5719-llvm-b95c102c2f00f69f53243f4fe310744d48307439.zip
Heed spill slot alignment on ARM.
Use the spill slot alignment as well as the local variable alignment to determine when the stack needs to be realigned. This works now that the ARM target can always realign the stack by using a base pointer. Still respect the ARMBaseRegisterInfo::canRealignStack() function vetoing a realigned stack. Don't use aligned spill code in that case. llvm-svn: 146997
Diffstat (limited to 'llvm/test/CodeGen/Thumb2')
-rw-r--r--llvm/test/CodeGen/Thumb2/aligned-spill.ll22
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Thumb2/aligned-spill.ll b/llvm/test/CodeGen/Thumb2/aligned-spill.ll
new file mode 100644
index 00000000000..1a987d02d07
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb2/aligned-spill.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
+target triple = "thumbv7-apple-ios"
+
+; CHECK: f
+; This function is forced to spill a double.
+; Verify that the spill slot is properly aligned.
+;
+; The caller-saved r4 is used as a scratch register for stack realignment.
+; CHECK: push {r4, r7, lr}
+; CHECK: bic r4, r4, #7
+; CHECK: mov sp, r4
+define void @f(double* nocapture %p) nounwind ssp {
+entry:
+ %0 = load double* %p, align 4
+ tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwind
+ tail call void @g() nounwind
+ store double %0, double* %p, align 4
+ ret void
+}
+
+declare void @g()
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