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| author | Shiva Chen <shiva0217@gmail.com> | 2018-04-25 14:19:12 +0000 |
|---|---|---|
| committer | Shiva Chen <shiva0217@gmail.com> | 2018-04-25 14:19:12 +0000 |
| commit | d58bd8dc4a1934e87c568a2fa40503461b3c7690 (patch) | |
| tree | 55ff893b43ec60c7b46e86ddf0d2778350dc4437 /llvm/test/CodeGen/RISCV/rem.ll | |
| parent | 98f9389f65e630a7243f9c99717009107758d492 (diff) | |
| download | bcm5719-llvm-d58bd8dc4a1934e87c568a2fa40503461b3c7690.tar.gz bcm5719-llvm-d58bd8dc4a1934e87c568a2fa40503461b3c7690.zip | |
[RISCV] Expand function call to "call" pseudoinstruction
To do this:
1. Change GlobalAddress SDNode to TargetGlobalAddress to avoid legalizer
split the symbol.
2. Change ExternalSymbol SDNode to TargetExternalSymbol to avoid legalizer
split the symbol.
3. Let PseudoCALL match direct call with target operand TargetGlobalAddress
and TargetExternalSymbol.
Differential Revision: https://reviews.llvm.org/D44885
llvm-svn: 330827
Diffstat (limited to 'llvm/test/CodeGen/RISCV/rem.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/rem.ll | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/RISCV/rem.ll b/llvm/test/CodeGen/RISCV/rem.ll index f9ef4c9c8e6..f37931f448e 100644 --- a/llvm/test/CodeGen/RISCV/rem.ll +++ b/llvm/test/CodeGen/RISCV/rem.ll @@ -9,9 +9,7 @@ define i32 @urem(i32 %a, i32 %b) nounwind { ; RV32I: # %bb.0: ; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: sw ra, 12(sp) -; RV32I-NEXT: lui a2, %hi(__umodsi3) -; RV32I-NEXT: addi a2, a2, %lo(__umodsi3) -; RV32I-NEXT: jalr a2 +; RV32I-NEXT: call __umodsi3 ; RV32I-NEXT: lw ra, 12(sp) ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret @@ -29,9 +27,7 @@ define i32 @srem(i32 %a, i32 %b) nounwind { ; RV32I: # %bb.0: ; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: sw ra, 12(sp) -; RV32I-NEXT: lui a2, %hi(__modsi3) -; RV32I-NEXT: addi a2, a2, %lo(__modsi3) -; RV32I-NEXT: jalr a2 +; RV32I-NEXT: call __modsi3 ; RV32I-NEXT: lw ra, 12(sp) ; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret |
