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authorReid Spencer <rspencer@reidspencer.com>2007-01-17 07:59:14 +0000
committerReid Spencer <rspencer@reidspencer.com>2007-01-17 07:59:14 +0000
commit83b3d8267225d585678d5d3af9bba5735f4b415d (patch)
tree9d6c2ad7bfd568186e83a39e6f03e1c0bf415715 /llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll
parent100602d7561ca5e245db6194bddae86357d203d4 (diff)
downloadbcm5719-llvm-83b3d8267225d585678d5d3af9bba5735f4b415d.tar.gz
bcm5719-llvm-83b3d8267225d585678d5d3af9bba5735f4b415d.zip
Regression is gone, don't try to find it on clean target.
llvm-svn: 33296
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll43
1 files changed, 43 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll b/llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll
new file mode 100644
index 00000000000..4f67f83f7e3
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll
@@ -0,0 +1,43 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 &&
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
+
+<4 x float> %test_uu72(<4 x float> *%P1, <4 x float> *%P2) {
+ %V1 = load <4 x float> *%P1
+ %V2 = load <4 x float> *%P2
+ ; vmrglw + vsldoi
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2,
+ <4 x uint> <uint undef, uint undef, uint 7, uint 2>
+ ret <4 x float> %V3
+}
+
+<4 x float> %test_30u5(<4 x float> *%P1, <4 x float> *%P2) {
+ %V1 = load <4 x float> *%P1
+ %V2 = load <4 x float> *%P2
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2,
+ <4 x uint> <uint 3, uint 0, uint undef, uint 5>
+ ret <4 x float> %V3
+}
+
+<4 x float> %test_3u73(<4 x float> *%P1, <4 x float> *%P2) {
+ %V1 = load <4 x float> *%P1
+ %V2 = load <4 x float> *%P2
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2,
+ <4 x uint> <uint 3, uint undef, uint 7, uint 3>
+ ret <4 x float> %V3
+}
+
+<4 x float> %test_3774(<4 x float> *%P1, <4 x float> *%P2) {
+ %V1 = load <4 x float> *%P1
+ %V2 = load <4 x float> *%P2
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2,
+ <4 x uint> <uint 3, uint 7, uint 7, uint 4>
+ ret <4 x float> %V3
+}
+
+<4 x float> %test_4450(<4 x float> *%P1, <4 x float> *%P2) {
+ %V1 = load <4 x float> *%P1
+ %V2 = load <4 x float> *%P2
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2,
+ <4 x uint> <uint 4, uint 4, uint 5, uint 0>
+ ret <4 x float> %V3
+}
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