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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-05-11 16:54:23 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-05-11 16:54:23 +0000 |
| commit | 96c3d626a277202498349675e1cce2e1f8a8b072 (patch) | |
| tree | 492db8a6e3728fa1434724ad4b83bdd5c8c5e6b3 /llvm/test/CodeGen/PowerPC/setcc-logic.ll | |
| parent | 40b201c326f13a3ec10036e702f015d91e7877e8 (diff) | |
| download | bcm5719-llvm-96c3d626a277202498349675e1cce2e1f8a8b072.tar.gz bcm5719-llvm-96c3d626a277202498349675e1cce2e1f8a8b072.zip | |
[PowerPC] Eliminate integer compare instructions - vol. 1
This patch is the first in a series of patches to provide code gen for
doing compares in GPRs when the compare result is required in a GPR.
It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64
extensions. This first patch handles equality comparison on i32 operands with
the result sign or zero extended.
Differential Revision: https://reviews.llvm.org/D31847
llvm-svn: 302810
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/setcc-logic.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/setcc-logic.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/PowerPC/setcc-logic.ll b/llvm/test/CodeGen/PowerPC/setcc-logic.ll index 2ed08e2ae38..a5a86f101a9 100644 --- a/llvm/test/CodeGen/PowerPC/setcc-logic.ll +++ b/llvm/test/CodeGen/PowerPC/setcc-logic.ll @@ -6,7 +6,7 @@ define zeroext i1 @all_bits_clear(i32 %P, i32 %Q) { ; CHECK: # BB#0: ; CHECK-NEXT: or 3, 3, 4 ; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 +; CHECK-NEXT: srwi 3, 3, 5 ; CHECK-NEXT: blr %a = icmp eq i32 %P, 0 %b = icmp eq i32 %Q, 0 @@ -30,11 +30,11 @@ define zeroext i1 @all_sign_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @all_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_set: ; CHECK: # BB#0: +; CHECK-NEXT: li 5, -1 ; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: li 5, 0 -; CHECK-NEXT: li 12, 1 -; CHECK-NEXT: cmpwi 0, 3, -1 -; CHECK-NEXT: isel 3, 12, 5, 2 +; CHECK-NEXT: xor 3, 3, 5 +; CHECK-NEXT: cntlzw 3, 3 +; CHECK-NEXT: srwi 3, 3, 5 ; CHECK-NEXT: blr %a = icmp eq i32 %P, -1 %b = icmp eq i32 %Q, -1 @@ -437,7 +437,7 @@ define zeroext i1 @and_eq(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 z ; CHECK-NEXT: xor 3, 3, 4 ; CHECK-NEXT: or 3, 3, 5 ; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 +; CHECK-NEXT: srwi 3, 3, 5 ; CHECK-NEXT: blr %cmp1 = icmp eq i16 %a, %b %cmp2 = icmp eq i16 %c, %d |
