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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-09-23 09:50:12 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-09-23 09:50:12 +0000 |
| commit | c4980799ab0646b3c3ed9552a8b9c1c2c3e892bb (patch) | |
| tree | c8c814a029d7f201799b4f422d266845f1f8607f /llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll | |
| parent | 092c2f4357166253aa0aba7bf27212872d95430f (diff) | |
| download | bcm5719-llvm-c4980799ab0646b3c3ed9552a8b9c1c2c3e892bb.tar.gz bcm5719-llvm-c4980799ab0646b3c3ed9552a8b9c1c2c3e892bb.zip | |
[PowerPC] Eliminate compares - add i32 sext/zext handling for SETULE/SETUGE
As mentioned in https://reviews.llvm.org/D33718, this simply adds another
pattern to the compare elimination sequence and is committed without a
differential revision.
llvm-svn: 314060
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll b/llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll index a9324592aea..249f27563e2 100644 --- a/llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll +++ b/llvm/test/CodeGen/PowerPC/fast-isel-conversion.ll @@ -245,11 +245,11 @@ entry: ; PPC970: uitofp_single_i16 %b.addr = alloca float, align 4 %conv = uitofp i16 %a to float -; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48 +; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 48 ; ELF64: std ; ELF64: lfd ; ELF64: fcfidus -; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48 +; ELF64LE: clrldi {{[0-9]+}}, {{[0-9]+}}, 48 ; ELF64LE: std ; ELF64LE: lfd ; ELF64LE: fcfidus @@ -269,11 +269,11 @@ entry: ; PPC970: uitofp_single_i8 %b.addr = alloca float, align 4 %conv = uitofp i8 %a to float -; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56 +; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 56 ; ELF64: std ; ELF64: lfd ; ELF64: fcfidus -; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56 +; ELF64LE: clrldi {{[0-9]+}}, {{[0-9]+}}, 56 ; ELF64LE: std ; ELF64LE: lfd ; ELF64LE: fcfidus @@ -334,11 +334,11 @@ entry: ; PPC970: uitofp_double_i16 %b.addr = alloca double, align 8 %conv = uitofp i16 %a to double -; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48 +; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 48 ; ELF64: std ; ELF64: lfd ; ELF64: fcfidu -; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48 +; ELF64LE: clrldi {{[0-9]+}}, {{[0-9]+}}, 48 ; ELF64LE: std ; ELF64LE: lfd ; ELF64LE: fcfidu @@ -357,11 +357,11 @@ entry: ; PPC970: uitofp_double_i8 %b.addr = alloca double, align 8 %conv = uitofp i8 %a to double -; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56 +; ELF64: clrldi {{[0-9]+}}, {{[0-9]+}}, 56 ; ELF64: std ; ELF64: lfd ; ELF64: fcfidu -; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56 +; ELF64LE: clrldi {{[0-9]+}}, {{[0-9]+}}, 56 ; ELF64LE: std ; ELF64LE: lfd ; ELF64LE: fcfidu |
