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| author | Ehsan Amiri <amehsan@ca.ibm.com> | 2016-10-24 17:31:09 +0000 |
|---|---|---|
| committer | Ehsan Amiri <amehsan@ca.ibm.com> | 2016-10-24 17:31:09 +0000 |
| commit | c90b02cf5035819577fa7defa08902cf63a8b749 (patch) | |
| tree | f8f23b18362f4afe9ec0a7eae6f780ae8111a89c /llvm/test/CodeGen/PowerPC/crbits.ll | |
| parent | 47f2616b6a491baa600ae2a1cdca43276be2bf2f (diff) | |
| download | bcm5719-llvm-c90b02cf5035819577fa7defa08902cf63a8b749.tar.gz bcm5719-llvm-c90b02cf5035819577fa7defa08902cf63a8b749.zip | |
[PPC] Generate positive FP zero using xor insn instead of loading from constant area
https://reviews.llvm.org/D23614
Currently we load +0.0 from constant area. That can change to be generated using
XOR instruction.
llvm-svn: 284995
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/crbits.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/crbits.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/PowerPC/crbits.ll b/llvm/test/CodeGen/PowerPC/crbits.ll index f2f3e6a2b8f..97f02ef31b3 100644 --- a/llvm/test/CodeGen/PowerPC/crbits.ll +++ b/llvm/test/CodeGen/PowerPC/crbits.ll @@ -13,7 +13,7 @@ entry: ; CHECK-LABEL: @test1 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2 ; CHECK-DAG: li [[REG1:[0-9]+]], 1 -; CHECK-DAG: lfs [[REG2:[0-9]+]], +; CHECK-DAG: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]] ; CHECK: crnor ; CHECK: crnor @@ -33,7 +33,7 @@ entry: ; CHECK-LABEL: @test2 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2 ; CHECK-DAG: li [[REG1:[0-9]+]], 1 -; CHECK-DAG: lfs [[REG2:[0-9]+]], +; CHECK-DAG: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]] ; CHECK: crnor ; CHECK: crnor @@ -55,7 +55,7 @@ entry: ; CHECK-LABEL: @test3 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2 ; CHECK-DAG: li [[REG1:[0-9]+]], 1 -; CHECK-DAG: lfs [[REG2:[0-9]+]], +; CHECK-DAG: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]] ; CHECK: crnor ; CHECK: crnor |
