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| author | Ehsan Amiri <amehsan@ca.ibm.com> | 2016-10-24 17:31:09 +0000 |
|---|---|---|
| committer | Ehsan Amiri <amehsan@ca.ibm.com> | 2016-10-24 17:31:09 +0000 |
| commit | c90b02cf5035819577fa7defa08902cf63a8b749 (patch) | |
| tree | f8f23b18362f4afe9ec0a7eae6f780ae8111a89c /llvm/test/CodeGen/PowerPC | |
| parent | 47f2616b6a491baa600ae2a1cdca43276be2bf2f (diff) | |
| download | bcm5719-llvm-c90b02cf5035819577fa7defa08902cf63a8b749.tar.gz bcm5719-llvm-c90b02cf5035819577fa7defa08902cf63a8b749.zip | |
[PPC] Generate positive FP zero using xor insn instead of loading from constant area
https://reviews.llvm.org/D23614
Currently we load +0.0 from constant area. That can change to be generated using
XOR instruction.
llvm-svn: 284995
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/crbits.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll | 12 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll | 2 |
3 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/PowerPC/crbits.ll b/llvm/test/CodeGen/PowerPC/crbits.ll index f2f3e6a2b8f..97f02ef31b3 100644 --- a/llvm/test/CodeGen/PowerPC/crbits.ll +++ b/llvm/test/CodeGen/PowerPC/crbits.ll @@ -13,7 +13,7 @@ entry: ; CHECK-LABEL: @test1 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2 ; CHECK-DAG: li [[REG1:[0-9]+]], 1 -; CHECK-DAG: lfs [[REG2:[0-9]+]], +; CHECK-DAG: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]] ; CHECK: crnor ; CHECK: crnor @@ -33,7 +33,7 @@ entry: ; CHECK-LABEL: @test2 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2 ; CHECK-DAG: li [[REG1:[0-9]+]], 1 -; CHECK-DAG: lfs [[REG2:[0-9]+]], +; CHECK-DAG: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]] ; CHECK: crnor ; CHECK: crnor @@ -55,7 +55,7 @@ entry: ; CHECK-LABEL: @test3 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2 ; CHECK-DAG: li [[REG1:[0-9]+]], 1 -; CHECK-DAG: lfs [[REG2:[0-9]+]], +; CHECK-DAG: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]] ; CHECK: crnor ; CHECK: crnor diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll b/llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll index 4390b938aea..f060395bb24 100644 --- a/llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll +++ b/llvm/test/CodeGen/PowerPC/fast-isel-fcmp-nan.ll @@ -2,7 +2,7 @@ define i1 @TestULT(double %t0) { ; CHECK-LABEL: TestULT: -; CHECK: mcrf +; CHECK: xscmpudp ; CHECK: blr entry: %t1 = fcmp ult double %t0, 0.000000e+00 @@ -49,7 +49,7 @@ good: define i1 @TestUEQ(double %t0) { ; CHECK-LABEL: TestUEQ: -; CHECK: mcrf +; CHECK: xscmpudp ; CHECK: blr entry: %t1 = fcmp ueq double %t0, 0.000000e+00 @@ -64,7 +64,7 @@ good: define i1 @TestUGT(double %t0) { ; CHECK-LABEL: TestUGT: -; CHECK: mcrf +; CHECK: xscmpudp ; CHECK: blr entry: %t1 = fcmp ugt double %t0, 0.000000e+00 @@ -111,7 +111,7 @@ good: define i1 @TestOLE(double %t0) { ; CHECK-LABEL: TestOLE: -; CHECK: mcrf +; CHECK: xscmpudp ; CHECK: blr entry: %t1 = fcmp ole double %t0, 0.000000e+00 @@ -126,7 +126,7 @@ good: define i1 @TestONE(double %t0) { ; CHECK-LABEL: TestONE: -; CHECK: mcrf +; CHECK: xscmpudp ; CHECK: blr entry: %t1 = fcmp one double %t0, 0.000000e+00 @@ -173,7 +173,7 @@ good: define i1 @TestOGE(double %t0) { ; CHECK-LABEL: TestOGE: -; CHECK: mcrf +; CHECK: xscmpudp ; CHECK: blr entry: %t1 = fcmp oge double %t0, 0.000000e+00 diff --git a/llvm/test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll b/llvm/test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll index 93d47df70db..960e6b61b5b 100644 --- a/llvm/test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll +++ b/llvm/test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll @@ -5,7 +5,7 @@ target triple = "powerpc64le-unknown-linux-gnu" ; Check that the conditional return block of fmax_double3.exit was not ; duplicated into the if.then.i block ; CHECK: # %if.then.i -; CHECK: lxvd2x +; CHECK: xxlxor ; CHECK: stxvd2x ; CHECK-NOT: bclr ; CHECK: {{^}}.LBB{{[0-9_]+}}: |
