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author | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2016-03-01 10:08:01 +0000 |
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committer | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2016-03-01 10:08:01 +0000 |
commit | 3a8f7f9e31dec87ccdc2ca83486e6c8a5c295e9d (patch) | |
tree | 19ab695f792f3545b09f715c5a6b5f38838981d7 /llvm/test/CodeGen/Mips/blez_bgez.ll | |
parent | 6de3f63bb0e40af4e248066390e2352829e671f8 (diff) | |
download | bcm5719-llvm-3a8f7f9e31dec87ccdc2ca83486e6c8a5c295e9d.tar.gz bcm5719-llvm-3a8f7f9e31dec87ccdc2ca83486e6c8a5c295e9d.zip |
[mips] Promote the result of SETCC nodes to GPR width.
Summary:
This patch modifies the existing comparison, branch, conditional-move
and select patterns, and adds new ones where needed. Also, the updated
SLT{u,i,iu} set of instructions generate a GPR width result.
The majority of the code changes in the Mips back-end fix the wrong
assumption that the result of SETCC nodes always produce an i32 value.
The changes in the common code path account for the fact that in 64-bit
MIPS targets, i1 is promoted to i32 instead of i64.
Reviewers: dsanders
Subscribers: dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D10970
llvm-svn: 262316
Diffstat (limited to 'llvm/test/CodeGen/Mips/blez_bgez.ll')
-rw-r--r-- | llvm/test/CodeGen/Mips/blez_bgez.ll | 48 |
1 files changed, 39 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/Mips/blez_bgez.ll b/llvm/test/CodeGen/Mips/blez_bgez.ll index dcda047f8d0..0aba5460555 100644 --- a/llvm/test/CodeGen/Mips/blez_bgez.ll +++ b/llvm/test/CodeGen/Mips/blez_bgez.ll @@ -1,10 +1,13 @@ -; RUN: llc -march=mipsel < %s | FileCheck %s -; RUN: llc -march=mips64el < %s | FileCheck %s +; RUN: llc -march=mipsel < %s | \ +; RUN: FileCheck %s -check-prefix=ALL +; RUN: llc -march=mips64el < %s | \ +; RUN: FileCheck %s -check-prefix=ALL -check-prefix=GP64 -; CHECK-LABEL: test_blez: -; CHECK: blez ${{[0-9]+}}, $BB +declare void @foo1() define void @test_blez(i32 %a) { +; ALL-LABEL: test_blez: +; ALL: blez ${{[0-9]+}}, $BB entry: %cmp = icmp sgt i32 %a, 0 br i1 %cmp, label %if.then, label %if.end @@ -17,13 +20,10 @@ if.end: ret void } -declare void @foo1() - -; CHECK-LABEL: test_bgez: -; CHECK: bgez ${{[0-9]+}}, $BB - define void @test_bgez(i32 %a) { entry: +; ALL-LABEL: test_bgez: +; ALL: bgez ${{[0-9]+}}, $BB %cmp = icmp slt i32 %a, 0 br i1 %cmp, label %if.then, label %if.end @@ -34,3 +34,33 @@ if.then: if.end: ret void } + +define void @test_blez_64(i64 %a) { +; GP64-LABEL: test_blez_64: +; GP64: blez ${{[0-9]+}}, $BB +entry: + %cmp = icmp sgt i64 %a, 0 + br i1 %cmp, label %if.then, label %if.end + +if.then: + tail call void @foo1() + br label %if.end + +if.end: + ret void +} + +define void @test_bgez_64(i64 %a) { +entry: +; ALL-LABEL: test_bgez_64: +; ALL: bgez ${{[0-9]+}}, $BB + %cmp = icmp slt i64 %a, 0 + br i1 %cmp, label %if.then, label %if.end + +if.then: + tail call void @foo1() + br label %if.end + +if.end: + ret void +} |