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| author | Puyan Lotfi <puyan@puyan.org> | 2019-12-16 13:23:03 -0500 |
|---|---|---|
| committer | Puyan Lotfi <puyan@puyan.org> | 2019-12-16 18:25:04 -0500 |
| commit | f63b64c0c3b486f164c3c66cce9f13df2bac6b6e (patch) | |
| tree | 48e3613733b42f20b4289e61c212328238b860bf /llvm/test/CodeGen/MIR | |
| parent | aa5ee8f244441a8ea103a7e0ed8b6f3e74454516 (diff) | |
| download | bcm5719-llvm-f63b64c0c3b486f164c3c66cce9f13df2bac6b6e.tar.gz bcm5719-llvm-f63b64c0c3b486f164c3c66cce9f13df2bac6b6e.zip | |
[llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands.
This patch makes it so that cases where multiple instructions that
differ only in their ConstantInt or ConstantFP MachineOperand values no
longer collide. For instance:
%0:_(s1) = G_CONSTANT i1 true
%1:_(s1) = G_CONSTANT i1 false
%2:_(s32) = G_FCONSTANT float 1.0
%3:_(s32) = G_FCONSTANT float 0.0
Prior to this patch the first two instructions would collide together.
Also, the last two G_FCONSTANT instructions would also collide. Now they
will no longer collide.
Differential Revision: https://reviews.llvm.org/D71558
Diffstat (limited to 'llvm/test/CodeGen/MIR')
| -rw-r--r-- | llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir b/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir new file mode 100644 index 00000000000..2202c74d643 --- /dev/null +++ b/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir @@ -0,0 +1,14 @@ +# RUN: llc -run-pass mir-canonicalizer -o - %s | FileCheck %s +--- +name: cimm_fpimm_hash_test +body: | + bb.0: + ; CHECK: _1:_(s1) = G_CONSTANT i1 true + ; CHECK: _1:_(s1) = G_CONSTANT i1 false + ; CHECK: _1:_(s32) = G_FCONSTANT float + ; CHECK: _1:_(s32) = G_FCONSTANT float + %0:_(s1) = G_CONSTANT i1 true + %1:_(s1) = G_CONSTANT i1 false + %2:_(s32) = G_FCONSTANT float 1.0 + %3:_(s32) = G_FCONSTANT float 0.0 +... |
