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authorAlex Lorenz <arphaman@gmail.com>2015-07-17 00:24:15 +0000
committerAlex Lorenz <arphaman@gmail.com>2015-07-17 00:24:15 +0000
commite5a44660ddfd5f3e0f9037cc7e93ae5bd84216a5 (patch)
tree7a354f313b8fba5486a9e4ccff11c1e15563baee /llvm/test/CodeGen/MIR
parentb2273bd3d62dd7570867df1bcb9a19757a9a78f5 (diff)
downloadbcm5719-llvm-e5a44660ddfd5f3e0f9037cc7e93ae5bd84216a5.tar.gz
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MIR Serialization: Serialize the frame setup machine instruction flag.
llvm-svn: 242491
Diffstat (limited to 'llvm/test/CodeGen/MIR')
-rw-r--r--llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir39
1 files changed, 39 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
new file mode 100644
index 00000000000..ca34fe1050d
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
@@ -0,0 +1,39 @@
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser parses the frame setup instruction flag.
+
+--- |
+
+ define i32 @compute(i32 %a) {
+ body:
+ %c = mul i32 %a, 11
+ ret i32 %c
+ }
+
+ define i32 @foo(i32 %a) {
+ entry:
+ %b = call i32 @compute(i32 %a)
+ ret i32 %b
+ }
+
+...
+---
+name: compute
+body:
+ - name: body
+ id: 0
+ instructions:
+ - '%eax = IMUL32rri8 %edi, 11, implicit-def %eflags'
+ - 'RETQ %eax'
+...
+---
+name: foo
+body:
+ - name: entry
+ id: 0
+ instructions:
+ # CHECK: frame-setup PUSH64r %rax
+ - 'frame-setup PUSH64r %rax, implicit-def %rsp, implicit %rsp'
+ - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
+ - '%rdx = POP64r implicit-def %rsp, implicit %rsp'
+ - 'RETQ %eax'
+...
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