MIR Serialization: Initial serialization of the machine operand target flags.

This commit implements the initial serialization of the machine operand target
flags. It extends the 'TargetInstrInfo' class to add two new methods that help
to provide text based serialization for the target flags.

This commit can serialize only the X86 target flags, and the target flags for
the other targets will be serialized in the follow-up commits.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 244185

4 files changed, 98 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir b/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
new file mode 100644
index 00000000000..a885a566b67
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
@@ -0,0 +1,26 @@
+# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+
+  @G = external global i32
+
+  define i32 @inc() {
+  entry:
+    %a = load i32, i32* @G
+    %b = add i32 %a, 1
+    ret i32 %b
+  }
+
+...
+---
+name: inc
+body:
+  - id: 0
+    name: entry
+    instructions:
+# CHECK: [[@LINE+1]]:51: expected the name of the target flag
+      - '%rax = MOV64rm %rip, 1, _, target-flags( ) @G, _'
+      - '%eax = MOV32rm killed %rax, 1, _, 0, _'
+      - '%eax = INC32r killed %eax, implicit-def dead %eflags'
+      - 'RETQ %eax'
+...
diff --git a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
index 251d1ff3617..f29ed358a71 100644
--- a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
@@ -51,6 +51,13 @@
     ret i32 %b
   }
 
+  define i32 @tf() {
+  entry:
+    %a = load i32, i32* @G
+    %b = add i32 %a, 1
+    ret i32 %b
+  }
+
 ...
 ---
 # CHECK: name: inc
@@ -130,3 +137,16 @@ body:
       - 'MOV32mr killed %rcx, 1, _, 0, _, %eax'
       - 'RETQ %eax'
 ...
+---
+# CHECK: name: tf
+name: tf
+body:
+  - id: 0
+    name: entry
+    instructions:
+# CHECK: %rax = MOV64rm %rip, 1, _, target-flags(x86-gotpcrel) @G, _
+      - '%rax = MOV64rm %rip, 1, _, target-flags(x86-gotpcrel) @G, _'
+      - '%eax = MOV32rm %rax, 1, _, 0, _'
+      - '%eax = INC32r %eax, implicit-def %eflags'
+      - 'RETQ %eax'
+...
diff --git a/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir b/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir
new file mode 100644
index 00000000000..1e1fc7b302d
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir
@@ -0,0 +1,26 @@
+# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+
+  @G = external global i32
+
+  define i32 @inc() {
+  entry:
+    %a = load i32, i32* @G
+    %b = add i32 %a, 1
+    ret i32 %b
+  }
+
+...
+---
+name: inc
+body:
+  - id: 0
+    name: entry
+    instructions:
+# CHECK: [[@LINE+1]]:50: use of undefined target flag 'x86-test'
+      - '%rax = MOV64rm %rip, 1, _, target-flags(x86-test) @G, _'
+      - '%eax = MOV32rm killed %rax, 1, _, 0, _'
+      - '%eax = INC32r killed %eax, implicit-def dead %eflags'
+      - 'RETQ %eax'
+...
diff --git a/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir b/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
new file mode 100644
index 00000000000..219a0d32ae9
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
@@ -0,0 +1,26 @@
+# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+
+  @G = external global i32
+
+  define i32 @inc() {
+  entry:
+    %a = load i32, i32* @G
+    %b = add i32 %a, 1
+    ret i32 %b
+  }
+
+...
+---
+name: inc
+body:
+  - id: 0
+    name: entry
+    instructions:
+# CHECK: [[@LINE+1]]:47: register operands can't have target flags
+      - '%rax = MOV64rm target-flags(x86-got) %rip, 1, _, @G, _'
+      - '%eax = MOV32rm killed %rax, 1, _, 0, _'
+      - '%eax = INC32r killed %eax, implicit-def dead %eflags'
+      - 'RETQ %eax'
+...