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| author | Matthias Braun <matze@braunis.de> | 2016-08-24 22:34:06 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2016-08-24 22:34:06 +0000 |
| commit | a319e2cae0298cf710d65dc5c82cc1549b36658e (patch) | |
| tree | c797ceef43a23547b8ac09e53f476abe79ee0264 /llvm/test/CodeGen/MIR/X86 | |
| parent | 5dce48e0a707dfc0afa775e817c8ec0165404d02 (diff) | |
| download | bcm5719-llvm-a319e2cae0298cf710d65dc5c82cc1549b36658e.tar.gz bcm5719-llvm-a319e2cae0298cf710d65dc5c82cc1549b36658e.zip | |
MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing it
llvm-svn: 279680
Diffstat (limited to 'llvm/test/CodeGen/MIR/X86')
7 files changed, 0 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir b/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir index bd9365b5f41..fe0740e9c62 100644 --- a/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir +++ b/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir @@ -10,7 +10,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } diff --git a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir index 95b1057b5b5..2bc825016bc 100644 --- a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir @@ -19,7 +19,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%edi' } diff --git a/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir b/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir index c3f4fca11ea..a5c7b48e96c 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir @@ -10,7 +10,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } diff --git a/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir b/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir index 9e307f8833d..fce8c1afa30 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir @@ -10,7 +10,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir index f0e8d1fcd8f..d84cebfc6df 100644 --- a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir +++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir @@ -19,7 +19,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } @@ -36,7 +35,6 @@ body: | ... --- name: test2 -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } diff --git a/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir b/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir index 2ba3288335f..7a0994def21 100644 --- a/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir +++ b/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir @@ -10,7 +10,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } diff --git a/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir b/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir index 05502fff406..84a38bf8380 100644 --- a/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir +++ b/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir @@ -10,7 +10,6 @@ ... --- name: test -hasInlineAsm: true tracksRegLiveness: true liveins: - { reg: '%rdi' } |
