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| author | Alex Lorenz <arphaman@gmail.com> | 2015-08-18 22:26:26 +0000 |
|---|---|---|
| committer | Alex Lorenz <arphaman@gmail.com> | 2015-08-18 22:26:26 +0000 |
| commit | a314d81328bb246646836f8c778a01b3ec4ddb87 (patch) | |
| tree | 0f8d4f0ac7bc15ba915b8dc945098f03eade0c4e /llvm/test/CodeGen/MIR/X86 | |
| parent | 913f776ff9b1ca1ee8875a9dba7f6e633932b4da (diff) | |
| download | bcm5719-llvm-a314d81328bb246646836f8c778a01b3ec4ddb87.tar.gz bcm5719-llvm-a314d81328bb246646836f8c778a01b3ec4ddb87.zip | |
MIR Serialization: Serialize the frame information's stack protector index.
llvm-svn: 245372
Diffstat (limited to 'llvm/test/CodeGen/MIR/X86')
| -rw-r--r-- | llvm/test/CodeGen/MIR/X86/expected-stack-object.mir | 67 | ||||
| -rw-r--r-- | llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir | 79 |
2 files changed, 146 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir b/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir new file mode 100644 index 00000000000..ff0c10d59e3 --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir @@ -0,0 +1,67 @@ +# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s + + +--- | + @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 + @__stack_chk_guard = external global i8* + + define i32 @test() #0 { + entry: + %StackGuardSlot = alloca i8* + %StackGuard = load i8*, i8** @__stack_chk_guard + call void @llvm.stackprotector(i8* %StackGuard, i8** %StackGuardSlot) + %test = alloca i8*, align 8 + %a = alloca i8, i64 5 + store i8* %a, i8** %test, align 8 + %b = load i8*, i8** %test, align 8 + %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* %b) + call void @llvm.stackprotectorcheck(i8** @__stack_chk_guard) + ret i32 %call + } + + declare i32 @printf(i8*, ...) + + declare void @llvm.stackprotector(i8*, i8**) #1 + + declare void @llvm.stackprotectorcheck(i8**) #2 + + attributes #0 = { ssp "stack-protector-buffer-size"="5" } + attributes #1 = { nounwind } + attributes #2 = { nounwind argmemonly } +... +--- +name: test +alignment: 4 +tracksRegLiveness: true +frameInfo: + stackSize: 40 + maxAlignment: 8 + adjustsStack: true + hasCalls: true +# CHECK: [[@LINE+1]]:21: expected a stack object + stackProtector: '0' +fixedStack: + - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, + callee-saved-register: '%rbx' } +stack: + - { id: 0, name: StackGuardSlot, offset: -24, size: 8, alignment: 8 } + - { id: 1, name: test, offset: -40, size: 8, alignment: 8 } + - { id: 2, name: a, offset: -29, size: 5, alignment: 1 } +body: | + bb.0.entry: + liveins: %rbx, %rbx + + frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp + %rsp = frame-setup SUB64ri8 %rsp, 32, implicit-def dead %eflags + %rbx = LOAD_STACK_GUARD :: (invariant load 8 from %ir.__stack_chk_guard) + MOV64mr %rsp, 1, _, 24, _, %rbx + %rsi = LEA64r %rsp, 1, _, 19, _ + MOV64mr %rsp, 1, _, 8, _, %rsi + %rdi = LEA64r %rip, 1, _, @.str, _ + dead %eax = MOV32r0 implicit-def dead %eflags, implicit-def %al + CALL64pcrel32 @printf, csr_64, implicit %rsp, implicit %rdi, implicit %rsi, implicit %al, implicit-def %rsp, implicit-def %eax + CMP64rm killed %rbx, %rsp, 1, _, 24, _, implicit-def %eflags + %rsp = ADD64ri8 %rsp, 32, implicit-def dead %eflags + %rbx = POP64r implicit-def %rsp, implicit %rsp + RETQ %eax +... diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir new file mode 100644 index 00000000000..a1f13aff68f --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir @@ -0,0 +1,79 @@ +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# This test ensures that the MIR parser parses the stack protector stack +# object reference in the machine frame info correctly. + +--- | + @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 + @__stack_chk_guard = external global i8* + + define i32 @test() #0 { + entry: + %StackGuardSlot = alloca i8* + %StackGuard = load i8*, i8** @__stack_chk_guard + call void @llvm.stackprotector(i8* %StackGuard, i8** %StackGuardSlot) + %test = alloca i8*, align 8 + %a = alloca i8, i64 5 + store i8* %a, i8** %test, align 8 + %b = load i8*, i8** %test, align 8 + %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* %b) + call void @llvm.stackprotectorcheck(i8** @__stack_chk_guard) + ret i32 %call + } + + declare i32 @printf(i8*, ...) + + declare void @llvm.stackprotector(i8*, i8**) #1 + + declare void @llvm.stackprotectorcheck(i8**) #2 + + attributes #0 = { ssp "stack-protector-buffer-size"="5" } + attributes #1 = { nounwind } + attributes #2 = { nounwind argmemonly } +... +--- +name: test +alignment: 4 +tracksRegLiveness: true +frameInfo: + stackSize: 40 + maxAlignment: 8 + adjustsStack: true + hasCalls: true +# CHECK-LABEL: name: test +# CHECK: frameInfo +# CHECK: stackProtector: '%stack.0.StackGuardSlot' + stackProtector: '%stack.0.StackGuardSlot' +fixedStack: + - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, + callee-saved-register: '%rbx' } +stack: + - { id: 0, name: StackGuardSlot, offset: -24, size: 8, alignment: 8 } + - { id: 1, name: test, offset: -40, size: 8, alignment: 8 } + - { id: 2, name: a, offset: -29, size: 5, alignment: 1 } +body: | + bb.0.entry: + successors: %bb.1.entry, %bb.2.entry + liveins: %rbx, %rbx + + frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp + %rsp = frame-setup SUB64ri8 %rsp, 32, implicit-def dead %eflags + %rbx = LOAD_STACK_GUARD :: (invariant load 8 from %ir.__stack_chk_guard) + MOV64mr %rsp, 1, _, 24, _, %rbx + %rsi = LEA64r %rsp, 1, _, 19, _ + MOV64mr %rsp, 1, _, 8, _, %rsi + %rdi = LEA64r %rip, 1, _, @.str, _ + dead %eax = MOV32r0 implicit-def dead %eflags, implicit-def %al + CALL64pcrel32 @printf, csr_64, implicit %rsp, implicit %rdi, implicit %rsi, implicit %al, implicit-def %rsp, implicit-def %eax + CMP64rm killed %rbx, %rsp, 1, _, 24, _, implicit-def %eflags + JNE_1 %bb.2.entry, implicit %eflags + + bb.1.entry: + liveins: %eax + + %rsp = ADD64ri8 %rsp, 32, implicit-def dead %eflags + %rbx = POP64r implicit-def %rsp, implicit %rsp + RETQ %eax + + bb.2.entry: + CALL64pcrel32 $__stack_chk_fail, csr_64, implicit %rsp, implicit-def %rsp +... |

