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| author | Guillaume Chatelet <gchatelet@google.com> | 2019-10-15 12:56:24 +0000 |
|---|---|---|
| committer | Guillaume Chatelet <gchatelet@google.com> | 2019-10-15 12:56:24 +0000 |
| commit | b65fa483058f1b4049c7201525779b4f49cceb80 (patch) | |
| tree | 465ad540bb829d323547089d9656f52e4d8733da /llvm/test/CodeGen/MIR/AMDGPU | |
| parent | a94546987529b4410b99a66dfd268b3faacb78ec (diff) | |
| download | bcm5719-llvm-b65fa483058f1b4049c7201525779b4f49cceb80.tar.gz bcm5719-llvm-b65fa483058f1b4049c7201525779b4f49cceb80.zip | |
[Alignment] Migrate Attribute::getWith(Stack)Alignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet, jdoerfert
Reviewed By: courbet
Subscribers: arsenm, jvesely, nhaehnle, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D68792
llvm-svn: 374884
Diffstat (limited to 'llvm/test/CodeGen/MIR/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir | 9 | ||||
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll | 6 |
2 files changed, 9 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir index 8196933bc58..8334ef5ef6c 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir @@ -76,7 +76,7 @@ body: | # ALL-LABEL: name: no_mfi # FULL: machineFunctionInfo: # FULL-NEXT: explicitKernArgSize: 0 -# FULL-NEXT: maxKernArgAlign: 0 +# FULL-NEXT: maxKernArgAlign: 1 # FULL-NEXT: ldsSize: 0 # FULL-NEXT: isEntryFunction: false # FULL-NEXT: noSignedZerosFPMath: false @@ -96,6 +96,7 @@ body: | # FULL-NEXT: body: # SIMPLE: machineFunctionInfo: +# SIMPLE-NEXT: maxKernArgAlign: 1 # SIMPLE-NEXT: argumentInfo: # SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } # SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' } @@ -112,7 +113,7 @@ body: | # ALL-LABEL: name: empty_mfi # FULL: machineFunctionInfo: # FULL-NEXT: explicitKernArgSize: 0 -# FULL-NEXT: maxKernArgAlign: 0 +# FULL-NEXT: maxKernArgAlign: 1 # FULL-NEXT: ldsSize: 0 # FULL-NEXT: isEntryFunction: false # FULL-NEXT: noSignedZerosFPMath: false @@ -132,6 +133,7 @@ body: | # FULL-NEXT: body: # SIMPLE: machineFunctionInfo: +# SIMPLE-NEXT: maxKernArgAlign: 1 # SIMPLE-NEXT: argumentInfo: # SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } # SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' } @@ -149,7 +151,7 @@ body: | # ALL-LABEL: name: empty_mfi_entry_func # FULL: machineFunctionInfo: # FULL-NEXT: explicitKernArgSize: 0 -# FULL-NEXT: maxKernArgAlign: 0 +# FULL-NEXT: maxKernArgAlign: 1 # FULL-NEXT: ldsSize: 0 # FULL-NEXT: isEntryFunction: true # FULL-NEXT: noSignedZerosFPMath: false @@ -169,6 +171,7 @@ body: | # FULL-NEXT: body: # SIMPLE: machineFunctionInfo: +# SIMPLE-NEXT: maxKernArgAlign: 1 # SIMPLE-NEXT: isEntryFunction: true # SIMPLE-NEXT: argumentInfo: # SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll index 400c73fce9e..bc354f2a0d8 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll +++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll @@ -39,7 +39,7 @@ define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) { ; CHECK-LABEL: {{^}}name: ps_shader ; CHECK: machineFunctionInfo: ; CHECK-NEXT: explicitKernArgSize: 0 -; CHECK-NEXT: maxKernArgAlign: 0 +; CHECK-NEXT: maxKernArgAlign: 1 ; CHECK-NEXT: ldsSize: 0 ; CHECK-NEXT: isEntryFunction: true ; CHECK-NEXT: noSignedZerosFPMath: false @@ -64,7 +64,7 @@ define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) { ; CHECK-LABEL: {{^}}name: function ; CHECK: machineFunctionInfo: ; CHECK-NEXT: explicitKernArgSize: 0 -; CHECK-NEXT: maxKernArgAlign: 0 +; CHECK-NEXT: maxKernArgAlign: 1 ; CHECK-NEXT: ldsSize: 0 ; CHECK-NEXT: isEntryFunction: false ; CHECK-NEXT: noSignedZerosFPMath: false @@ -89,7 +89,7 @@ define void @function() { ; CHECK-LABEL: {{^}}name: function_nsz ; CHECK: machineFunctionInfo: ; CHECK-NEXT: explicitKernArgSize: 0 -; CHECK-NEXT: maxKernArgAlign: 0 +; CHECK-NEXT: maxKernArgAlign: 1 ; CHECK-NEXT: ldsSize: 0 ; CHECK-NEXT: isEntryFunction: false ; CHECK-NEXT: noSignedZerosFPMath: true |
