MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.

llvm-svn: 244982

2 files changed, 23 insertions, 25 deletions

diff --git a/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir b/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
index 6deff62ec9c..cf7572ecad3 100644
--- a/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
@@ -15,18 +15,17 @@
 ...
 ---
 name:            trivial_fp_func
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%lr', '%fp', '%lr', '%fp' ]
-    instructions:
-      - '%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2'
-      - '%fp = frame-setup ADDXri %sp, 0, 0'
-      # CHECK: CFI_INSTRUCTION .cfi_def_cfa %w29, 16
-      - 'frame-setup CFI_INSTRUCTION .cfi_def_cfa %w29, 16'
-      - 'frame-setup CFI_INSTRUCTION .cfi_offset %w30, -8'
-      - 'frame-setup CFI_INSTRUCTION .cfi_offset %w29, -16'
-      - 'BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp'
-      - '%sp, %fp, %lr = LDPXpost %sp, 2'
-      - RET_ReallyLR
+body: |
+  bb.0.entry:
+    liveins: %lr, %fp, %lr, %fp
+
+    %sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
+    %fp = frame-setup ADDXri %sp, 0, 0
+    ; CHECK: CFI_INSTRUCTION .cfi_def_cfa %w29, 16
+    frame-setup CFI_INSTRUCTION .cfi_def_cfa %w29, 16
+    frame-setup CFI_INSTRUCTION .cfi_offset %w30, -8
+    frame-setup CFI_INSTRUCTION .cfi_offset %w29, -16
+    BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
+    %sp, %fp, %lr = LDPXpost %sp, 2
+    RET_ReallyLR
 ...
diff --git a/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir b/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
index d47c8ba47f6..e23a352dff2 100644
--- a/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
@@ -15,15 +15,14 @@
 ...
 ---
 name:            trivial_fp_func
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%lr', '%fp', '%lr', '%fp' ]
-    instructions:
-      - '%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2'
-      - '%fp = frame-setup ADDXri %sp, 0, 0'
-      - 'BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp'
-# CHECK: %sp, %fp, %lr = LDPXpost %sp, 2
-      - '%sp, %fp, %lr = LDPXpost %sp, 2'
-      - RET_ReallyLR
+body: |
+  bb.0.entry:
+    liveins: %lr, %fp, %lr, %fp
+
+    %sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
+    %fp = frame-setup ADDXri %sp, 0, 0
+    BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
+  ; CHECK: %sp, %fp, %lr = LDPXpost %sp, 2
+    %sp, %fp, %lr = LDPXpost %sp, 2
+    RET_ReallyLR
 ...