diff options
author | Cong Hou <congh@google.com> | 2015-09-18 18:19:40 +0000 |
---|---|---|
committer | Cong Hou <congh@google.com> | 2015-09-18 18:19:40 +0000 |
commit | f9f9ffb98becba3bf72ab121b5f89f4c250b029d (patch) | |
tree | a662c296d49e983dcca191e117957b592a525018 /llvm/test/CodeGen/ARM | |
parent | 2b38f33b82d9d0dd9dc566edb532f71c2406886c (diff) | |
download | bcm5719-llvm-f9f9ffb98becba3bf72ab121b5f89f4c250b029d.tar.gz bcm5719-llvm-f9f9ffb98becba3bf72ab121b5f89f4c250b029d.zip |
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
In ARMBaseInstrInfo::isProfitableToIfCvt(), there is a simple cost model in which the number of cycles is scaled by a probability to estimate the cost. However, when the number of cycles is small (which is usually the case), there is a precision issue after the computation. To avoid this issue, this patch scales those cycles by 1024 (chosen to make the multiplication a litter faster) before they are scaled by the probability. Other variables are also scaled up for the final comparison.
Differential Revision: http://reviews.llvm.org/D12742
llvm-svn: 248018
Diffstat (limited to 'llvm/test/CodeGen/ARM')
-rw-r--r-- | llvm/test/CodeGen/ARM/2013-10-11-select-stalls.ll | 7 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/ifcvt4.ll | 6 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/test-sharedidx.ll | 3 |
4 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/ARM/2013-10-11-select-stalls.ll b/llvm/test/CodeGen/ARM/2013-10-11-select-stalls.ll index d6045c7b8c8..c41fe905aa8 100644 --- a/llvm/test/CodeGen/ARM/2013-10-11-select-stalls.ll +++ b/llvm/test/CodeGen/ARM/2013-10-11-select-stalls.ll @@ -1,8 +1,13 @@ ; REQUIRES: asserts -; RUN: llc < %s -mtriple=thumbv7-apple-ios -stats 2>&1 | not grep "Number of pipeline stalls" +; RUN: llc < %s -mtriple=thumbv7-apple-ios -disable-ifcvt-diamond -stats 2>&1 | FileCheck %s ; Evaluate the two vld1.8 instructions in separate MBB's, ; instead of stalling on one and conditionally overwriting its result. +; +; Update: After if-conversion the two vld1.8 instructions are in the same MBB +; again. So we disable this if-conversion to eliminate its influence to this +; test. +; CHECK-NOT: Number of pipeline stalls define <16 x i8> @multiselect(i32 %avail, i8* %foo, i8* %bar) { entry: %vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %foo, i32 1) diff --git a/llvm/test/CodeGen/ARM/ifcvt4.ll b/llvm/test/CodeGen/ARM/ifcvt4.ll index 8c6825aeda9..0a6b99fb89b 100644 --- a/llvm/test/CodeGen/ARM/ifcvt4.ll +++ b/llvm/test/CodeGen/ARM/ifcvt4.ll @@ -1,10 +1,8 @@ ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -; Do not if-convert when branches go to the different loops. ; CHECK-LABEL: t: -; CHECK-NOT: subgt -; CHECK-NOT: suble -; Don't use +; CHECK: subgt +; CHECK: suble define i32 @t(i32 %a, i32 %b) { entry: %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1] diff --git a/llvm/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll b/llvm/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll index c7f47b0962d..a1abef9605c 100644 --- a/llvm/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll +++ b/llvm/test/CodeGen/ARM/sjlj-prepare-critical-edge.ll @@ -77,8 +77,8 @@ declare void @terminatev() ; CHECK: blx __Znwm ; CHECK: {{.*}}@ %entry.do.body.i.i.i_crit_edge ; CHECK: str r0, [sp, [[OFFSET:#[0-9]+]]] -; CHECK: ldr [[R0:r[0-9]+]], [sp, [[OFFSET]]] ; CHECK: {{.*}}@ %do.body.i.i.i +; CHECK: ldr [[R0:r[0-9]+]], [sp, [[OFFSET]]] ; CHECK: cbz [[R0]] %"class.std::__1::basic_string" = type { %"class.std::__1::__compressed_pair" } diff --git a/llvm/test/CodeGen/ARM/test-sharedidx.ll b/llvm/test/CodeGen/ARM/test-sharedidx.ll index 77d0f30485d..db32f18d82c 100644 --- a/llvm/test/CodeGen/ARM/test-sharedidx.ll +++ b/llvm/test/CodeGen/ARM/test-sharedidx.ll @@ -59,9 +59,6 @@ for.body.1: ; preds = %for.body br i1 %cmp.1, label %for.body.2, label %for.end for.body.2: ; preds = %for.body.1 -; CHECK: %for.body.2 -; CHECK: ldrb {{r[0-9]+|lr}}, [{{r[0-9]+|lr}}, {{r[0-9]+|lr}}]! -; CHECK: ldrb {{r[0-9]+|lr}}, [{{r[0-9]+|lr}}, {{r[0-9]+|lr}}]! %arrayidx.2 = getelementptr inbounds i8, i8* %a, i32 %add5.1 %4 = load i8, i8* %arrayidx.2, align 1 %conv6.2 = zext i8 %4 to i32 |