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| author | John Brawn <john.brawn@arm.com> | 2015-08-21 10:48:17 +0000 |
|---|---|---|
| committer | John Brawn <john.brawn@arm.com> | 2015-08-21 10:48:17 +0000 |
| commit | eab960c46f3d71cc3c6614be7e538c727996fcaa (patch) | |
| tree | 0223869aaff0e26b642094fee8aa2350f76c260d /llvm/test/CodeGen/ARM | |
| parent | 2ecb118a1df230715162c9a77b02eeec8fa7d791 (diff) | |
| download | bcm5719-llvm-eab960c46f3d71cc3c6614be7e538c727996fcaa.tar.gz bcm5719-llvm-eab960c46f3d71cc3c6614be7e538c727996fcaa.zip | |
[DAGCombiner] Fold together mul and shl when both are by a constant
This is intended to improve code generation for GEPs, as the index value is
shifted by the element size and in GEPs of multi-dimensional arrays the index
of higher dimensions is multiplied by the lower dimension size.
Differential Revision: http://reviews.llvm.org/D12197
llvm-svn: 245689
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/gep-optimization.ll | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/gep-optimization.ll b/llvm/test/CodeGen/ARM/gep-optimization.ll new file mode 100644 index 00000000000..ce5af66d56c --- /dev/null +++ b/llvm/test/CodeGen/ARM/gep-optimization.ll @@ -0,0 +1,77 @@ +; RUN: llc < %s -mtriple=armv7a-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-AT2 +; RUN: llc < %s -mtriple=thumbv7m-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-AT2 +; RUN: llc < %s -mtriple=thumbv6m-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T1 + +; This test checks that various kinds of getelementptr are all optimised to a +; simple multiply plus add, with the add being done by a register offset if the +; result is used in a load. + +; CHECK-LABEL: calc_1d: +; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84 +; CHECK-AT2: mla r0, r1, [[REG1]], r0 +; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]] +; CHECK-T1: adds r0, r0, [[REG2]] +define i32* @calc_1d(i32* %p, i32 %n) { +entry: + %mul = mul nsw i32 %n, 21 + %add.ptr = getelementptr inbounds i32, i32* %p, i32 %mul + ret i32* %add.ptr +} + +; CHECK-LABEL: load_1d: +; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84 +; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}} +; CHECK: ldr r0, [r0, [[REG2]]] +define i32 @load_1d(i32* %p, i32 %n) #1 { +entry: + %mul = mul nsw i32 %n, 21 + %arrayidx = getelementptr inbounds i32, i32* %p, i32 %mul + %0 = load i32, i32* %arrayidx, align 4 + ret i32 %0 +} + +; CHECK-LABEL: calc_2d_a: +; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84 +; CHECK-AT2: mla r0, r1, [[REG1]], r0 +; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]] +; CHECK-T1: adds r0, r0, [[REG2]] +define i32* @calc_2d_a([100 x i32]* %p, i32 %n) { +entry: + %mul = mul nsw i32 %n, 21 + %arrayidx1 = getelementptr inbounds [100 x i32], [100 x i32]* %p, i32 0, i32 %mul + ret i32* %arrayidx1 +} + +; CHECK-LABEL: load_2d_a: +; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84 +; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}} +; CHECK: ldr r0, [r0, [[REG2]]] +define i32 @load_2d_a([100 x i32]* %p, i32 %n) #1 { +entry: + %mul = mul nsw i32 %n, 21 + %arrayidx1 = getelementptr inbounds [100 x i32], [100 x i32]* %p, i32 0, i32 %mul + %0 = load i32, i32* %arrayidx1, align 4 + ret i32 %0 +} + +; CHECK-LABEL: calc_2d_b: +; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84 +; CHECK-AT2: mla r0, r1, [[REG1]], r0 +; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]] +; CHECK-T1: adds r0, r0, [[REG2]] +define i32* @calc_2d_b([21 x i32]* %p, i32 %n) { +entry: + %arrayidx1 = getelementptr inbounds [21 x i32], [21 x i32]* %p, i32 %n, i32 0 + ret i32* %arrayidx1 +} + +; CHECK-LABEL: load_2d_b: +; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84 +; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}} +; CHECK: ldr r0, [r0, [[REG2]]] +define i32 @load_2d_b([21 x i32]* %p, i32 %n) { +entry: + %arrayidx1 = getelementptr inbounds [21 x i32], [21 x i32]* %p, i32 %n, i32 0 + %0 = load i32, i32* %arrayidx1, align 4 + ret i32 %0 +} |

