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author | Manman Ren <mren@apple.com> | 2012-06-15 21:32:12 +0000 |
---|---|---|
committer | Manman Ren <mren@apple.com> | 2012-06-15 21:32:12 +0000 |
commit | e0763c7472562c562d09a8c33164aa8ecb9096e7 (patch) | |
tree | 3b148fbef911ccd416e85f97e2bfafe0772da684 /llvm/test/CodeGen/ARM | |
parent | 523af827de101ea6cc30e42e54e4067434392695 (diff) | |
download | bcm5719-llvm-e0763c7472562c562d09a8c33164aa8ecb9096e7.tar.gz bcm5719-llvm-e0763c7472562c562d09a8c33164aa8ecb9096e7.zip |
ARM: optimization for sub+abs.
This patch will optimize abs(x-y)
FROM
sub, movs, rsbmi
TO
subs, rsbmi
For abs, we will use cmp instead of movs. This is necessary because we already
have an existing peephole pass which optimizes away cmp following sub.
rdar: 11633193
llvm-svn: 158551
Diffstat (limited to 'llvm/test/CodeGen/ARM')
-rw-r--r-- | llvm/test/CodeGen/ARM/iabs.ll | 20 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/thumb2-it-block.ll | 4 |
2 files changed, 21 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/iabs.ll b/llvm/test/CodeGen/ARM/iabs.ll index 89e309d1606..600a8c29ea9 100644 --- a/llvm/test/CodeGen/ARM/iabs.ll +++ b/llvm/test/CodeGen/ARM/iabs.ll @@ -10,7 +10,25 @@ define i32 @test(i32 %a) { %b = icmp sgt i32 %a, -1 %abs = select i1 %b, i32 %a, i32 %tmp1neg ret i32 %abs -; CHECK: movs r0, r0 +; CHECK: cmp ; CHECK: rsbmi r0, r0, #0 ; CHECK: bx lr } + +; rdar://11633193 +;; 3 instructions will be generated for abs(a-b): +;; subs +;; rsbmi +;; bx +define i32 @test2(i32 %a, i32 %b) nounwind readnone ssp { +entry: +; CHECK: test2 +; CHECK: subs +; CHECK-NEXT: rsbmi +; CHECK-NEXT: bx + %sub = sub nsw i32 %a, %b + %cmp = icmp sgt i32 %sub, -1 + %sub1 = sub nsw i32 0, %sub + %cond = select i1 %cmp, i32 %sub, i32 %sub1 + ret i32 %cond +} diff --git a/llvm/test/CodeGen/ARM/thumb2-it-block.ll b/llvm/test/CodeGen/ARM/thumb2-it-block.ll index 28fd4696535..a25352c0f03 100644 --- a/llvm/test/CodeGen/ARM/thumb2-it-block.ll +++ b/llvm/test/CodeGen/ARM/thumb2-it-block.ll @@ -3,10 +3,10 @@ define i32 @test(i32 %a, i32 %b) { entry: -; CHECK: movs.w +; CHECK: cmp ; CHECK-NEXT: it mi ; CHECK-NEXT: rsbmi -; CHECK-NEXT: movs.w +; CHECK-NEXT: cmp ; CHECK-NEXT: it mi ; CHECK-NEXT: rsbmi %cmp1 = icmp slt i32 %a, 0 |