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| author | Pirama Arumuga Nainar <pirama@google.com> | 2016-03-24 14:06:03 +0000 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2016-03-24 14:06:03 +0000 |
| commit | dc45aef2d89ceb486a81ace7e7c84b0d704e56c2 (patch) | |
| tree | 72e22c134f396db685abfb8a93d2b1ee6dcf39bc /llvm/test/CodeGen/ARM | |
| parent | 733ea34f38d0c545f46e2d891a88f2677614912d (diff) | |
| download | bcm5719-llvm-dc45aef2d89ceb486a81ace7e7c84b0d704e56c2.tar.gz bcm5719-llvm-dc45aef2d89ceb486a81ace7e7c84b0d704e56c2.zip | |
Remove unsafe AssertZext after promoting result of FP_TO_FP16
Summary:
Some target lowerings of FP_TO_FP16, for instance ARM's vcvtb.f16.f32
instruction, do not guarantee that the top 16 bits are zeroed out.
Remove the unsafe AssertZext and add tests to exercise this.
Reviewers: jmolloy, sbaranga, kristof.beyls, aadg
Subscribers: llvm-commits, srhines, aemerson
Differential Revision: http://reviews.llvm.org/D18426
llvm-svn: 264285
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fp16-v3.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/fp16-v3.ll b/llvm/test/CodeGen/ARM/fp16-v3.ll index 6ed9c9d22c9..182469d514e 100644 --- a/llvm/test/CodeGen/ARM/fp16-v3.ll +++ b/llvm/test/CodeGen/ARM/fp16-v3.ll @@ -25,4 +25,16 @@ define void @test_vec3(<3 x half>* %arr, i32 %i) #0 { ret void } +; CHECK-LABEL: test_bitcast: +; CHECK: vcvtb.f16.f32 +; CHECK: vcvtb.f16.f32 +; CHECK: vcvtb.f16.f32 +; CHECK: pkhbt +; CHECK: uxth +define void @test_bitcast(<3 x half> %inp, <3 x i16>* %arr) #0 { + %bc = bitcast <3 x half> %inp to <3 x i16> + store <3 x i16> %bc, <3 x i16>* %arr, align 8 + ret void +} + attributes #0 = { nounwind } |
