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| author | Prakhar Bahuguna <prakhar.bahuguna@arm.com> | 2016-07-29 09:16:46 +0000 |
|---|---|---|
| committer | Prakhar Bahuguna <prakhar.bahuguna@arm.com> | 2016-07-29 09:16:46 +0000 |
| commit | d1233e857ef7dbf33a6d3dfbecad04d7a46c8a45 (patch) | |
| tree | ec8fe2fc550e815d4a38576a2f5661f958cef107 /llvm/test/CodeGen/ARM | |
| parent | da704adc2f2674a755caf866211a8553f2ba78e1 (diff) | |
| download | bcm5719-llvm-d1233e857ef7dbf33a6d3dfbecad04d7a46c8a45.tar.gz bcm5719-llvm-d1233e857ef7dbf33a6d3dfbecad04d7a46c8a45.zip | |
[Thumb] Emit Thumb move in both Thumb modes for struct_byval predicates
Summary:
The MOV/MOVT instructions being chosen for struct_byval predicates was
conditional only on Thumb2, resulting in an ARM MOV/MOVT instruction
being incorrectly emitted in Thumb1 mode. This is especially apparent
with v8-m.base targets. This patch ensures that Thumb instructions are
emitted in both Thumb modes.
Reviewers: rengolin, t.p.northover
Subscribers: llvm-commits, aemerson, rengolin
Differential Revision: https://reviews.llvm.org/D22865
llvm-svn: 277128
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll b/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll index 0a9bc3c87f9..fc4f11e8b45 100644 --- a/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll +++ b/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll @@ -7,6 +7,10 @@ ;RUN: llc < %s -mtriple=thumbv5-none-linux-gnueabi -verify-machineinstrs -filetype=obj | llvm-objdump -triple thumbv5-none-linux-gnueabi -disassemble - > %t ;RUN: cat %t | FileCheck %s --check-prefix=THUMB1 ;RUN: cat %t | FileCheck %s --check-prefix=T1POST +;RUN: llc < %s -mtriple=thumbv8m.base-arm-none-eabi -verify-machineinstrs -filetype=obj | llvm-objdump -triple thumbv8m.base-arm-none-eabi -disassemble - > %t +;RUN: cat %t | FileCheck %s --check-prefix=THUMB1 +;RUN: cat %t | FileCheck %s --check-prefix=T1POST +;RUN: cat %t | FileCheck %s --check-prefix=V8MBASE ;This file contains auto generated tests for the lowering of passing structs ;byval in the arm backend. We have tests for both packed and unpacked @@ -44,6 +48,10 @@ declare void @use_J(%struct.J* byval) declare void @use_K(%struct.K* byval) %struct.L = type { [ 100 x i32 ], [ 3 x i8 ] } ; 403 bytes declare void @use_L(%struct.L* byval) +%struct.M = type { [ 64 x i8 ] } ; 64 bytes +declare void @use_M(%struct.M* byval) +%struct.N = type { [ 128 x i8 ] } ; 128 bytes +declare void @use_N(%struct.N* byval) ;ARM-LABEL: test_A_1: ;THUMB2-LABEL: test_A_1: @@ -1521,3 +1529,24 @@ declare void @use_L(%struct.L* byval) call void @use_L(%struct.L* byval align 16 %a) ret void } +;V8MBASE-LABEL: test_M: + define void @test_M() { + +;V8MBASE: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} +;V8MBASE: adds [[BASE]], #1 +;V8MBASE-NOT: movw + entry: + %a = alloca %struct.M, align 1 + call void @use_M(%struct.M* byval align 1 %a) + ret void + } +;V8MBASE-LABEL: test_N: + define void @test_N() { + +;V8MBASE: movw r{{[0-9]+}}, #{{[0-9]+}} +;V8MBASE-NOT: b #{{[0-9]+}} + entry: + %a = alloca %struct.N, align 1 + call void @use_N(%struct.N* byval align 1 %a) + ret void + } |

