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author | Bob Wilson <bob.wilson@apple.com> | 2009-04-01 17:58:54 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2009-04-01 17:58:54 +0000 |
commit | cf1ec2cc680ddf1c03d256b18442fd13d9f7e4a8 (patch) | |
tree | 9205be39a5f02b1e216e4b48d702d1c568a29828 /llvm/test/CodeGen/ARM | |
parent | 9ce13241ffc9eb3c1b6cfdcf13c9ec2573642b00 (diff) | |
download | bcm5719-llvm-cf1ec2cc680ddf1c03d256b18442fd13d9f7e4a8.tar.gz bcm5719-llvm-cf1ec2cc680ddf1c03d256b18442fd13d9f7e4a8.zip |
Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
assembly.
llvm-svn: 68218
Diffstat (limited to 'llvm/test/CodeGen/ARM')
-rw-r--r-- | llvm/test/CodeGen/ARM/inlineasm-imm-arm.ll | 31 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll | 43 |
2 files changed, 74 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/inlineasm-imm-arm.ll b/llvm/test/CodeGen/ARM/inlineasm-imm-arm.ll new file mode 100644 index 00000000000..2ceceae0d9d --- /dev/null +++ b/llvm/test/CodeGen/ARM/inlineasm-imm-arm.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=arm + +; Test ARM-mode "I" constraint, for any Data Processing immediate. +define i32 @testI(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind + ret i32 %y +} + +; Test ARM-mode "J" constraint, for compatibility with unknown use in GCC. +define void @testJ() { + tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind + ret void +} + +; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates. +define void @testK() { + tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind + ret void +} + +; Test ARM-mode "L" constraint, for negated Data Processing immediates. +define void @testL() { + tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind + ret void +} + +; Test ARM-mode "M" constraint, for value between 0 and 32. +define i32 @testM(i32 %x) { + %y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind + ret i32 %y +} diff --git a/llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll b/llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll new file mode 100644 index 00000000000..2c872e7e310 --- /dev/null +++ b/llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll @@ -0,0 +1,43 @@ +; RUN: llvm-as < %s | llc -march=thumb + +; Test Thumb-mode "I" constraint, for ADD immediate. +define i32 @testI(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "J" constraint, for negated ADD immediates. +define void @testJ() { + tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind + ret void +} + +; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use. +define void @testK() { + tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind + ret void +} + +; Test Thumb-mode "L" constraint, for 3-operand ADD immediates. +define i32 @testL(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "M" constraint, for "ADD r = sp + imm". +define i32 @testM() { + %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "N" constraint, for values between 0 and 31. +define i32 @testN(i32 %x) { + %y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm". +define void @testO() { + tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind + ret void +} |