diff options
| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-02-01 13:48:40 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-02-01 13:48:40 +0000 |
| commit | 9d9a86535e9949a04352ac51e4cc5a933fb73a72 (patch) | |
| tree | 81e6b3cd55d3389bd8169f62ff7cbd0397387e34 /llvm/test/CodeGen/ARM | |
| parent | a8d12bbc3fae40f20f87a94c400176110ac7d51b (diff) | |
| download | bcm5719-llvm-9d9a86535e9949a04352ac51e4cc5a933fb73a72.tar.gz bcm5719-llvm-9d9a86535e9949a04352ac51e4cc5a933fb73a72.zip | |
[ARM] FullFP16 LowerReturn Fix
Commit r323512 introduced an optimisation in LowerReturn for half-precision
return values. A missing check caused a crash when the return value is "undef"
(i.e. a node that has no operands).
Differential Revision: https://reviews.llvm.org/D42743
llvm-svn: 323968
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fp16-instructions.ll | 29 |
1 files changed, 21 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/ARM/fp16-instructions.ll b/llvm/test/CodeGen/ARM/fp16-instructions.ll index 93b6982f5d6..b8ba9a6e706 100644 --- a/llvm/test/CodeGen/ARM/fp16-instructions.ll +++ b/llvm/test/CodeGen/ARM/fp16-instructions.ll @@ -1,15 +1,27 @@ ; SOFT: -; RUN: llc < %s -mtriple=arm-none-eabi -float-abi=soft | FileCheck %s --check-prefix=CHECK-SOFT +; RUN: llc < %s -mtriple=arm-none-eabi -float-abi=soft | FileCheck %s --check-prefixes=CHECK,CHECK-SOFT ; SOFTFP: -; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+vfp3 | FileCheck %s --check-prefix=CHECK-SOFTFP-VFP3 -; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+vfp4 | FileCheck %s --check-prefix=CHECK-SOFTFP-FP16 -; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+fullfp16 | FileCheck %s --check-prefix=CHECK-SOFTFP-FULLFP16 +; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+vfp3 | FileCheck %s --check-prefixes=CHECK,CHECK-SOFTFP-VFP3 +; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+vfp4 | FileCheck %s --check-prefixes=CHECK,CHECK-SOFTFP-FP16 +; RUN: llc < %s -mtriple=arm-none-eabi -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-SOFTFP-FULLFP16 ; HARD: -; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp3 | FileCheck %s --check-prefix=CHECK-HARDFP-VFP3 -; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp4 | FileCheck %s --check-prefix=CHECK-HARDFP-FP16 -; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fullfp16 | FileCheck %s --check-prefix=CHECK-HARDFP-FULLFP16 +; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp3 | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-VFP3 +; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp4 | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-FP16 +; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-FULLFP16 + + +define float @RetValBug(float %A.coerce) local_unnamed_addr { +entry: + ret float undef +; This expression is optimised away due to the undef value. Check that +; LowerReturn can handle undef nodes (i.e. nodes which do not have any +; operands) when FullFP16 is enabled. +; +; CHECK-LABEL: RetValBug: +; CHECK-HARDFP-FULLFP16: mov pc, lr +} define float @Add(float %a.coerce, float %b.coerce) local_unnamed_addr { entry: @@ -25,6 +37,8 @@ entry: %5 = bitcast i32 %tmp4.0.insert.ext to float ret float %5 +; CHECK-LABEL: Add: + ; CHECK-SOFT: bl __aeabi_h2f ; CHECK-SOFT: bl __aeabi_h2f ; CHECK-SOFT: bl __aeabi_fadd @@ -64,5 +78,4 @@ entry: ; CHECK-HARDFP-FULLFP16: vadd.f16 s0, s0, s1 ; CHECK-HARDFP-FULLFP16-NEXT: mov pc, lr - } |
