Revert "[ARM] Enable shrink-wrapping by default."

This reverts commit r252825, as it broke ASAN on ARM. Investigating...

llvm-svn: 252889

7 files changed, 10 insertions, 16 deletions

diff --git a/llvm/test/CodeGen/ARM/call-tc.ll b/llvm/test/CodeGen/ARM/call-tc.ll
index 8821029520f..b2b6aaec813 100644
--- a/llvm/test/CodeGen/ARM/call-tc.ll
+++ b/llvm/test/CodeGen/ARM/call-tc.ll
@@ -83,11 +83,9 @@ declare void @foo() nounwind
 define void @t7() nounwind {
 entry:
 ; CHECKT2D-LABEL: t7:
-; CHECKT2D: it ne
-; CHECKT2D-NEXT: bne.w _foo
-; CHECKT2D-NEXT: push
-; CHECKT2D-NEXT: mov r7, sp
-; CHECKT2D-NEXT: blx _foo
+; CHECKT2D: blxeq _foo
+; CHECKT2D-NEXT: pop.w
+; CHECKT2D-NEXT: b.w _foo
   br i1 undef, label %bb, label %bb1.lr.ph
 
 bb1.lr.ph:
diff --git a/llvm/test/CodeGen/ARM/fold-stack-adjust.ll b/llvm/test/CodeGen/ARM/fold-stack-adjust.ll
index 8944a40f311..5bec6445560 100644
--- a/llvm/test/CodeGen/ARM/fold-stack-adjust.ll
+++ b/llvm/test/CodeGen/ARM/fold-stack-adjust.ll
@@ -1,6 +1,4 @@
-; Disable shrink-wrapping on the first test otherwise we wouldn't
-; exerce the path for PR18136.
-; RUN: llc -mtriple=thumbv7-apple-none-macho < %s -enable-shrink-wrap=false | FileCheck %s
+; RUN: llc -mtriple=thumbv7-apple-none-macho < %s | FileCheck %s
 ; RUN: llc -mtriple=thumbv6m-apple-none-macho -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-T1
 ; RUN: llc -mtriple=thumbv7-apple-darwin-ios -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-IOS
 ; RUN: llc -mtriple=thumbv7--linux-gnueabi -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-LINUX
diff --git a/llvm/test/CodeGen/ARM/ifcvt5.ll b/llvm/test/CodeGen/ARM/ifcvt5.ll
index 9fb8abde613..3aa2139cc03 100644
--- a/llvm/test/CodeGen/ARM/ifcvt5.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt5.ll
@@ -13,10 +13,10 @@ entry:
 
 define i32 @t1(i32 %a, i32 %b) {
 ; A8-LABEL: t1:
-; A8: bxlt lr
+; A8: poplt {r7, pc}
 
 ; SWIFT-LABEL: t1:
-; SWIFT: bxlt lr
+; SWIFT: pop {r7, pc}
 ; SWIFT: pop {r7, pc}
 entry:
 	%tmp1 = icmp sgt i32 %a, 10		; <i1> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/ifcvt6.ll b/llvm/test/CodeGen/ARM/ifcvt6.ll
index 668069751cf..78901930e4b 100644
--- a/llvm/test/CodeGen/ARM/ifcvt6.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt6.ll
@@ -3,7 +3,7 @@
 define void @foo(i32 %X, i32 %Y) {
 entry:
 ; CHECK: cmpne
-; CHECK: bxhi lr
+; CHECK: pophi
 	%tmp1 = icmp ult i32 %X, 4		; <i1> [#uses=1]
 	%tmp4 = icmp eq i32 %Y, 0		; <i1> [#uses=1]
 	%tmp7 = or i1 %tmp4, %tmp1		; <i1> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/ifcvt8.ll b/llvm/test/CodeGen/ARM/ifcvt8.ll
index e8b7f692639..ca9a5c63cda 100644
--- a/llvm/test/CodeGen/ARM/ifcvt8.ll
+++ b/llvm/test/CodeGen/ARM/ifcvt8.ll
@@ -5,9 +5,7 @@
 declare void @abort()
 
 define fastcc void @t(%struct.SString* %word, i8 signext  %c) {
-; CHECK-NOT: pop
-; CHECK: bxne
-; CHECK-NOT: pop
+; CHECK: popne
 entry:
 	%tmp1 = icmp eq %struct.SString* %word, null		; <i1> [#uses=1]
 	br i1 %tmp1, label %cond_true, label %cond_false
diff --git a/llvm/test/CodeGen/ARM/machine-cse-cmp.ll b/llvm/test/CodeGen/ARM/machine-cse-cmp.ll
index 611cba6ed1f..1f92ff4e119 100644
--- a/llvm/test/CodeGen/ARM/machine-cse-cmp.ll
+++ b/llvm/test/CodeGen/ARM/machine-cse-cmp.ll
@@ -27,7 +27,7 @@ define void @f2() nounwind ssp {
 entry:
 ; CHECK-LABEL: f2:
 ; CHECK: cmp
-; CHECK: bxlt
+; CHECK: poplt
 ; CHECK-NOT: cmp
 ; CHECK: movle
   %0 = load i32, i32* @foo, align 4
diff --git a/llvm/test/CodeGen/ARM/thumb-alignment.ll b/llvm/test/CodeGen/ARM/thumb-alignment.ll
index b9ddfbb714d..c11d4b6da3c 100644
--- a/llvm/test/CodeGen/ARM/thumb-alignment.ll
+++ b/llvm/test/CodeGen/ARM/thumb-alignment.ll
@@ -23,7 +23,7 @@ define i32* @bar() {
 
 ; CHECK: .globl	baz
 ; CHECK-NEXT: .align	2
-; CHECK: tbb
+; CHECK: adr.w
 define i32 @baz() {
   %1 = load i32, i32* @c, align 4
   switch i32 %1, label %7 [