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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-02-07 08:37:17 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-02-07 08:37:17 +0000 |
| commit | 8c0739347cbc4fe2b2d323621debbf7141fd6b74 (patch) | |
| tree | 9d052fbf533604c1e5129f9b53486982ef7e5b48 /llvm/test/CodeGen/ARM | |
| parent | 5f133dc99b42db10d342e7a8644507ff90c7f446 (diff) | |
| download | bcm5719-llvm-8c0739347cbc4fe2b2d323621debbf7141fd6b74.tar.gz bcm5719-llvm-8c0739347cbc4fe2b2d323621debbf7141fd6b74.zip | |
[ARM] FP16 mov imm pattern
This is a follow up of r324321, adding a match pattern for mov with a FP16
immediate (also fixing operand vfp_f16imm that wasn't even compiling).
Differential Revision: https://reviews.llvm.org/D42973
llvm-svn: 324456
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fp16-instructions.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/fp16-instructions.ll b/llvm/test/CodeGen/ARM/fp16-instructions.ll index 2cb5497e2c0..e792856b9ab 100644 --- a/llvm/test/CodeGen/ARM/fp16-instructions.ll +++ b/llvm/test/CodeGen/ARM/fp16-instructions.ll @@ -471,7 +471,20 @@ entry: ; TODO: fix immediates. ; 21. VMOV (between general-purpose register and half-precision register) + ; 22. VMOV (immediate) +define i32 @movi(i32 %a.coerce) { +entry: + %tmp.0.extract.trunc = trunc i32 %a.coerce to i16 + %0 = bitcast i16 %tmp.0.extract.trunc to half + %add = fadd half %0, 0xHC000 + %1 = bitcast half %add to i16 + %tmp2.0.insert.ext = zext i16 %1 to i32 + ret i32 %tmp2.0.insert.ext + +; CHECK-LABEL: movi: +; CHECK-HARDFP-FULLFP16: vmov.f16 s0, #-2.000000e+00 +} ; 23. VMUL define float @Mul(float %a.coerce, float %b.coerce) { |
