Move tests to the correct place

test/CodeGen/MIR is for testing the MIR parser/printer. Tests for passes
and targets belong to test/CodeGen/TARGETNAME.

llvm-svn: 322925

7 files changed, 276 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir b/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
new file mode 100644
index 00000000000..c9a88b62ef9
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
@@ -0,0 +1,23 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name:            foo
+body:             |
+  bb.0:
+    B %bb.2
+
+  bb.1:
+    BX_RET 14, 0
+
+  bb.2:
+    Bcc %bb.1, 1, %cpsr
+
+  bb.3:
+    B %bb.1
+...
+
+# We should get a single block containing the BX_RET, with no successors at all
+
+# CHECK:      body:
+# CHECK-NEXT:   bb.0:
+# CHECK-NEXT:     BX_RET
+
diff --git a/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir b/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir
new file mode 100644
index 00000000000..90d606a162d
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir
@@ -0,0 +1,65 @@
+# RUN: llc -mtriple=arm-apple-ios -o - %s -run-pass if-converter | FileCheck %s
+---
+name:            f1
+body:             |
+  bb.0:
+    successors: %bb.1
+
+    B %bb.1
+
+  bb.1:
+    successors: %bb.2, %bb.4
+
+    Bcc %bb.4, 1, %cpsr
+
+  bb.2:
+    successors: %bb.3, %bb.5
+
+    Bcc %bb.5, 1, %cpsr
+
+  bb.3:
+    successors: %bb.5
+
+    B %bb.5
+
+  bb.4:
+    successors:
+
+  bb.5:
+    successors: %bb.1, %bb.6
+
+    Bcc %bb.1, 1, %cpsr
+
+  bb.6:
+    BX_RET 14, _
+
+...
+
+# IfConversion.cpp/canFallThroughTo thought there was a fallthrough from
+# bb.4 to bb5 even if the successor list was empty.
+# bb.4 is empty, so it surely looks like it can fallthrough, but this is what
+# happens for a bb just containing an "unreachable".
+
+#CHECK: body:             |
+#CHECK:   bb.0:
+#CHECK:     successors: %bb.1
+
+#CHECK:   bb.1:
+#CHECK:     successors: %bb.3({{.*}}), %bb.2
+
+# The original brr_cond from bb.1, jumping to the empty bb
+#CHECK:     Bcc %bb.2
+#CHECK:     B %bb.3
+
+# Empty bb.2, originally containing "unreachable" and thus has no successors
+# and we cannot guess them: we should print an empty list of successors.
+#CHECK:   bb.2:
+#CHECK: successors:{{ *$}}
+
+#CHECK:   bb.3:
+#CHECK:     successors: %bb.1
+
+# Conditional BX_RET and then loop back to bb.1
+#CHECK:     BX_RET 0
+#CHECK:     B %bb.1
+
diff --git a/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir
new file mode 100644
index 00000000000..6b7ad20aa12
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir
@@ -0,0 +1,30 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name:            foo
+body:             |
+  bb.0:
+    Bcc %bb.2, 1, %cpsr
+
+  bb.1:
+    %sp = tADDspi %sp, 1, 14, _
+    B %bb.3
+
+  bb.2:
+    %sp = tADDspi %sp, 2, 14, _
+    B %bb.3
+
+  bb.3:
+  successors:
+    %sp = tADDspi %sp, 3, 14, _
+    BX_RET 14, _
+...
+
+# Diamond testcase with unanalyzable instruction in the BB following the
+# diamond.
+
+# CHECK: body:             |
+# CHECK:   bb.0:
+# CHECK:     %sp = tADDspi %sp, 2, 1, %cpsr
+# CHECK:     %sp = tADDspi %sp, 1, 0, %cpsr, implicit %sp
+# CHECK:     %sp = tADDspi %sp, 3, 14, %noreg
+# CHECK:     BX_RET 14, %noreg
diff --git a/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir
new file mode 100644
index 00000000000..f5f09a8ec4a
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir
@@ -0,0 +1,48 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name:            foo
+body:             |
+  bb.0:
+    Bcc %bb.2, 1, %cpsr
+
+  bb.1:
+  successors: %bb.3(0x20000000), %bb.4(0x60000000)
+    %sp = tADDspi %sp, 1, 14, _
+    Bcc %bb.3, 1, %cpsr
+    B %bb.4
+
+  bb.2:
+  successors: %bb.3(0x20000000), %bb.4(0x60000000)
+    %sp = tADDspi %sp, 2, 14, _
+    Bcc %bb.3, 1, %cpsr
+    B %bb.4
+
+  bb.3:
+  successors:
+    %sp = tADDspi %sp, 3, 14, _
+    BX_RET 14, _
+
+  bb.4:
+  successors:
+    %sp = tADDspi %sp, 4, 14, _
+    BX_RET 14, _
+...
+
+# Forked-diamond testcase with unanalyzable instructions in both the True and
+# False BBs following the forked diamond.
+
+# CHECK: body:             |
+# CHECK:   bb.0:
+# CHECK:     successors: %bb.2(0x20000000), %bb.1(0x60000000)
+
+# CHECK:     %sp = tADDspi %sp, 2, 1, %cpsr
+# CHECK:     %sp = tADDspi %sp, 1, 0, %cpsr, implicit %sp
+# CHECK:     Bcc %bb.2, 1, %cpsr
+
+# CHECK:   bb.1:
+# CHECK:     %sp = tADDspi %sp, 4, 14, %noreg
+# CHECK:     BX_RET 14, %noreg
+
+# CHECK:   bb.2:
+# CHECK:     %sp = tADDspi %sp, 3, 14, %noreg
+# CHECK:     BX_RET 14, %noreg
diff --git a/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir b/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir
new file mode 100644
index 00000000000..13ba94fb672
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir
@@ -0,0 +1,33 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name:            f1
+body:             |
+  bb.0:
+
+  bb.1:
+    Bcc %bb.3, 0, %cpsr
+
+  bb.2:
+
+  bb.3:
+    Bcc %bb.1, 0, %cpsr
+
+  bb.4:
+  successors: %bb.1
+    tBRIND %r1, 14, _
+...
+
+# We should only get bb.1 as successor to bb.1. No zero percent probability
+# edge from bb.1 to bb.2. There shouldn't even be a bb.2 at all.
+
+# CHECK: body:             |
+# CHECK:   bb.0:
+# CHECK:     successors: %bb.1(0x80000000)
+
+# CHECK:   bb.1:
+# CHECK:     successors: %bb.1(0x80000000)
+# CHECK-NOT: %bb.2(0x00000000)
+# CHECK:     tBRIND %r1, 1, %cpsr
+# CHECK:     B %bb.1
+
+#CHECK-NOT: bb.2:
diff --git a/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir
new file mode 100644
index 00000000000..8d1c71ac98f
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir
@@ -0,0 +1,25 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name:            foo
+body:             |
+  bb.0:
+    Bcc %bb.2, 0, %cpsr
+
+  bb.1:
+  successors:
+    BX_RET 14, _
+
+  bb.2:
+  successors:
+    %sp = tADDspi %sp, 2, 14, _
+    BX_RET 14, _
+...
+
+# Simple testcase with unanalyzable instructions in both TBB and FBB.
+
+# CHECK: body:             |
+# CHECK:   bb.0:
+# CHECK:     %sp = tADDspi %sp, 2, 0, %cpsr
+# CHECK:     BX_RET 0, %cpsr
+# CHECK:     BX_RET 14, %noreg
+
diff --git a/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir b/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir
new file mode 100644
index 00000000000..92ecbc8dbbe
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir
@@ -0,0 +1,52 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+--- |
+  declare void @__stack_chk_fail()
+  declare void @bar()
+
+  define void @foo() {
+    ret void
+  }
+...
+---
+name:            foo
+body:             |
+
+  bb.0:
+    Bcc %bb.1, 1, %cpsr
+    B %bb.2
+
+  bb.1:
+    Bcc %bb.3, 0, %cpsr
+
+  bb.2:
+  successors:
+    tBL 14, %cpsr, @__stack_chk_fail
+
+  bb.3:
+  successors:
+    %sp = tADDspi %sp, 2, 14, _
+    %sp = tADDspi %sp, 2, 14, _
+    tTAILJMPdND @bar, 14, %cpsr
+...
+
+# bb.2 has no successors, presumably because __stack_chk_fail doesn't return,
+# so there should be no edge from bb.2 to bb.3.
+# Nevertheless, IfConversion treats bb.1, bb.2, bb.3 as a triangle and
+# inserts a predicated copy of bb.2 in bb.1.
+
+# This caused r302876 to die with a failed assertion.
+
+# CHECK:     bb.0:
+# CHECK:       successors: %bb.2(0x40000000), %bb.1(0x40000000)
+# CHECK:       Bcc %bb.2, 1, %cpsr
+
+# CHECK:     bb.1:
+# CHECK-NOT:   successors: %bb
+# CHECK:       tBL 14, %cpsr, @__stack_chk_fail
+
+# CHECK:     bb.2:
+# CHECK-NOT:   successors: %bb
+# CHECK:       tBL 1, %cpsr, @__stack_chk_fail
+# CHECK:       %sp = tADDspi %sp, 2, 14, %noreg
+# CHECK:       %sp = tADDspi %sp, 2, 14, %noreg
+# CHECK:       tTAILJMPdND @bar, 14, %cpsr