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| author | Devang Patel <dpatel@apple.com> | 2011-10-11 18:09:58 +0000 |
|---|---|---|
| committer | Devang Patel <dpatel@apple.com> | 2011-10-11 18:09:58 +0000 |
| commit | 453d401a51c24c7746b38a313cfbedbe7db80e8f (patch) | |
| tree | 71c4ce6e5c858329ed0dcf61c9f6d6c6e96e75ed /llvm/test/CodeGen/ARM | |
| parent | ff2c52ce63adfac29b241c2a87da0edfce9289d3 (diff) | |
| download | bcm5719-llvm-453d401a51c24c7746b38a313cfbedbe7db80e8f.tar.gz bcm5719-llvm-453d401a51c24c7746b38a313cfbedbe7db80e8f.zip | |
Add dominance check for the instruction being hoisted.
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.
llvm-svn: 141689
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/lsr-unfolded-offset.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/lsr-unfolded-offset.ll b/llvm/test/CodeGen/ARM/lsr-unfolded-offset.ll index 61b25bb94af..bf26a9670a7 100644 --- a/llvm/test/CodeGen/ARM/lsr-unfolded-offset.ll +++ b/llvm/test/CodeGen/ARM/lsr-unfolded-offset.ll @@ -4,12 +4,11 @@ ; register pressure and therefore spilling. There is more room for improvement ; here. -; CHECK: sub sp, #{{32|28|24}} +; CHECK: sub sp, #{{40|32|28|24}} ; CHECK: %for.inc ; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, # ; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, # -; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, # ; CHECK: add target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" |
