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| author | Diana Picus <diana.picus@linaro.org> | 2017-02-02 14:01:00 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-02-02 14:01:00 +0000 |
| commit | 32cd9b434c74134368192bd8142e05fe2170ed91 (patch) | |
| tree | 8bb0ffc65208a95c0dbb91145b4dd6cdc487a2d5 /llvm/test/CodeGen/ARM | |
| parent | 0c11c7b5c74264354f94c3fd945366e8814d3186 (diff) | |
| download | bcm5719-llvm-32cd9b434c74134368192bd8142e05fe2170ed91.tar.gz bcm5719-llvm-32cd9b434c74134368192bd8142e05fe2170ed91.zip | |
[ARM] GlobalISel: Lower pointer args and returns
It is important to change the ArgInfo's type from pointer to integer, otherwise
the CC assign function won't know what to do. Instead of hacking it up, we use
ComputeValueVTs and introduce some of the helpers that we will need later on for
lowering more complex types.
llvm-svn: 293889
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 38 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll | 29 |
2 files changed, 67 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll index a20a108d8a9..fa17271b547 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll @@ -134,3 +134,41 @@ entry: %sum = add i8 %p2, %p4 ret i8 %sum } + +define i16 @test_ptr_arg(i16* %p) { +; CHECK-LABEL: name: test_ptr_arg +; CHECK: liveins: %r0 +; CHECK: [[VREGP:%[0-9]+]](p0) = COPY %r0 +; CHECK: [[VREGV:%[0-9]+]](s16) = G_LOAD [[VREGP]](p0) +entry: + %v = load i16, i16* %p + ret i16 %v +} + +define i32* @test_ptr_ret(i32** %p) { +; Test pointer returns and pointer-to-pointer arguments +; CHECK-LABEL: name: test_ptr_ret +; CHECK: liveins: %r0 +; CHECK: [[VREGP:%[0-9]+]](p0) = COPY %r0 +; CHECK: [[VREGV:%[0-9]+]](p0) = G_LOAD [[VREGP]](p0) +; CHECK: %r0 = COPY [[VREGV]] +; CHECK: BX_RET 14, _, implicit %r0 +entry: + %v = load i32*, i32** %p + ret i32* %v +} + +define i32 @test_ptr_arg_on_stack(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32* %p) { +; CHECK-LABEL: name: test_ptr_arg_on_stack +; CHECK: fixedStack: +; CHECK: id: [[P:[0-9]+]]{{.*}}offset: 0{{.*}}size: 4 +; CHECK: liveins: %r0, %r1, %r2, %r3 +; CHECK: [[FIP:%[0-9]+]]{{.*}} = G_FRAME_INDEX %fixed-stack.[[P]] +; CHECK: [[VREGP:%[0-9]+]](p0) = G_LOAD [[FIP]](p0) +; CHECK: [[VREGV:%[0-9]+]](s32) = G_LOAD [[VREGP]](p0) +; CHECK: %r0 = COPY [[VREGV]] +; CHECK: BX_RET 14, _, implicit %r0 +entry: + %v = load i32, i32* %p + ret i32 %v +} diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll index f5b706e7d21..2b44cd20830 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll @@ -110,3 +110,32 @@ entry: %sum = add i8 %p2, %p4 ret i8 %sum } + +define i32 @test_ptr_arg_in_reg(i32* %p) { +; CHECK-LABEL: test_ptr_arg_in_reg: +; CHECK: ldr r0, [r0] +; CHECK: bx lr +entry: + %v = load i32, i32* %p + ret i32 %v +} + +define i32 @test_ptr_arg_on_stack(i32 %f0, i32 %f1, i32 %f2, i32 %f3, i32* %p) { +; CHECK-LABEL: test_ptr_arg_on_stack: +; CHECK: mov r0, sp +; CHECK: ldr r0, [r0] +; CHECK: ldr r0, [r0] +; CHECK: bx lr +entry: + %v = load i32, i32* %p + ret i32 %v +} + +define i8* @test_ptr_ret(i8** %p) { +; CHECK-LABEL: test_ptr_ret: +; CHECK: ldr r0, [r0] +; CHECK: bx lr +entry: + %v = load i8*, i8** %p + ret i8* %v +} |

