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| author | Diana Picus <diana.picus@linaro.org> | 2018-01-12 12:06:01 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2018-01-12 12:06:01 +0000 |
| commit | 2dc54056932c2469c198a73d5fc4471a7774c31e (patch) | |
| tree | bd9c97fcfa50d38d46818669ceb96a120074a5d6 /llvm/test/CodeGen/ARM | |
| parent | e74243d4736efcecf794dd5693cd49864b2c5b03 (diff) | |
| download | bcm5719-llvm-2dc54056932c2469c198a73d5fc4471a7774c31e.tar.gz bcm5719-llvm-2dc54056932c2469c198a73d5fc4471a7774c31e.zip | |
[ARM GlobalISel] Map G_FMA to FPR
llvm-svn: 322367
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 60 |
1 files changed, 58 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir index 049f4c60f86..844bdf87da8 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir @@ -62,10 +62,14 @@ define void @test_fneg_s32() #0 { ret void } define void @test_fneg_s64() #0 { ret void } + define void @test_fma_s32() #2 { ret void } + define void @test_fma_s64() #2 { ret void } + define void @test_soft_fp_s64() #0 { ret void } attributes #0 = { "target-features"="+vfp2"} attributes #1 = { "target-features"="+hwdiv-arm" } + attributes #2 = { "target-features"="+vfp4"} ... --- name: test_add_s32 @@ -1104,7 +1108,6 @@ selected: false # CHECK: registers: # CHECK: - { id: 0, class: fprb, preferred-register: '' } # CHECK: - { id: 1, class: fprb, preferred-register: '' } - registers: - { id: 0, class: _ } - { id: 1, class: _ } @@ -1127,7 +1130,6 @@ selected: false # CHECK: registers: # CHECK: - { id: 0, class: fprb, preferred-register: '' } # CHECK: - { id: 1, class: fprb, preferred-register: '' } - registers: - { id: 0, class: _ } - { id: 1, class: _ } @@ -1142,6 +1144,60 @@ body: | ... --- +name: test_fma_s32 +# CHECK-LABEL: name: test_fma_s32 +legalized: true +regBankSelected: false +selected: false +# CHECK: registers: +# CHECK: - { id: 0, class: fprb, preferred-register: '' } +# CHECK: - { id: 1, class: fprb, preferred-register: '' } +# CHECK: - { id: 2, class: fprb, preferred-register: '' } +# CHECK: - { id: 3, class: fprb, preferred-register: '' } +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } +body: | + bb.0: + liveins: %s0, %s1, %s2 + + %0(s32) = COPY %s0 + %1(s32) = COPY %s1 + %2(s32) = COPY %s2 + %3(s32) = G_FMA %0, %1, %2 + %s0 = COPY %3(s32) + BX_RET 14, %noreg, implicit %s0 +... +--- +name: test_fma_s64 +# CHECK-LABEL: name: test_fma_s64 +legalized: true +regBankSelected: false +selected: false +# CHECK: registers: +# CHECK: - { id: 0, class: fprb, preferred-register: '' } +# CHECK: - { id: 1, class: fprb, preferred-register: '' } +# CHECK: - { id: 2, class: fprb, preferred-register: '' } +# CHECK: - { id: 3, class: fprb, preferred-register: '' } +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } +body: | + bb.0: + liveins: %d0, %d1, %d2 + + %0(s64) = COPY %d0 + %1(s64) = COPY %d1 + %2(s64) = COPY %d2 + %3(s64) = G_FMA %0, %1, %2 + %d0 = COPY %3(s64) + BX_RET 14, %noreg, implicit %d0 +... +--- name: test_soft_fp_s64 # CHECK-LABEL: name: test_soft_fp_s64 legalized: true |
