[DAGCombiner] Add tests for thumb load-combine.

2 files changed, 593 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/ARM/load-combine-big-endian.ll b/llvm/test/CodeGen/ARM/load-combine-big-endian.ll
index b5434b43821..7b028714f4f 100644
--- a/llvm/test/CodeGen/ARM/load-combine-big-endian.ll
+++ b/llvm/test/CodeGen/ARM/load-combine-big-endian.ll
@@ -1,6 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=armeb-unknown | FileCheck %s
 ; RUN: llc < %s -mtriple=armv6eb-unknown | FileCheck %s --check-prefix=CHECK-ARMv6
+; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv6
+; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv7
 
 ; i8* p; // p is 4 byte aligned
 ; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]
@@ -14,6 +16,18 @@ define i32 @load_i32_by_i8_big_endian(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_big_endian:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_big_endian:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 4
@@ -57,6 +71,16 @@ define i32 @load_i32_by_i8_bswap(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -92,6 +116,18 @@ define i32 @load_i32_by_i16_by_i8_big_endian(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i16_by_i8_big_endian:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i16_by_i8_big_endian:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 4
@@ -128,6 +164,24 @@ define i32 @load_i32_by_i16(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #2]
+; CHECK-THUMBv6-NEXT:    ldrb r2, [r0, #3]
+; CHECK-THUMBv6-NEXT:    lsls r2, r2, #8
+; CHECK-THUMBv6-NEXT:    adds r1, r2, r1
+; CHECK-THUMBv6-NEXT:    ldrh r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrh r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrh r0, [r0, #2]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i16*
   %tmp1 = load i16, i16* %tmp, align 4
@@ -153,6 +207,26 @@ define i32 @load_i32_by_i16_i8(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i16_i8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #3]
+; CHECK-THUMBv6-NEXT:    ldrb r2, [r0, #2]
+; CHECK-THUMBv6-NEXT:    lsls r2, r2, #8
+; CHECK-THUMBv6-NEXT:    adds r1, r2, r1
+; CHECK-THUMBv6-NEXT:    ldrh r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r1, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i16_i8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r2, [r0, #2]
+; CHECK-THUMBv7-NEXT:    ldrh r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #3]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r2, lsl #8
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i16*
   %tmp1 = bitcast i32* %arg to i8*
@@ -200,6 +274,18 @@ define i64 @load_i64_by_i8_bswap(i64* %arg) {
 ; CHECK-ARMv6-NEXT:    rev r0, r3
 ; CHECK-ARMv6-NEXT:    rev r1, r2
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i64_by_i8_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r2, [r0]
+; CHECK-THUMBv6-NEXT:    ldr r1, [r0, #4]
+; CHECK-THUMBv6-NEXT:    mov r0, r2
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i64_by_i8_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrd r0, r1, [r0]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i64* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 8
@@ -256,6 +342,21 @@ define i64 @load_i64_by_i8(i64* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldrd r0, r1, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i64_by_i8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r1, [r0]
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, #4]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    rev r1, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i64_by_i8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrd r1, r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    rev r1, r1
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i64* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 8
@@ -318,6 +419,17 @@ define i32 @load_i32_by_i8_nonzero_offset(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_nonzero_offset:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    movs r1, #1
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr.w r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -362,6 +474,17 @@ define i32 @load_i32_by_i8_neg_offset(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #-4]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_neg_offset:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    subs r0, r0, #4
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0, #-4]
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -398,6 +521,19 @@ define i32 @load_i32_by_i8_nonzero_offset_bswap(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    movs r1, #1
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr.w r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -434,6 +570,19 @@ define i32 @load_i32_by_i8_neg_offset_bswap(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #-4]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_neg_offset_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    subs r0, r0, #4
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0, #-4]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -480,6 +629,31 @@ define i32 @load_i32_by_bswap_i16(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_bswap_i16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #2]
+; CHECK-THUMBv6-NEXT:    ldrb r2, [r0, #3]
+; CHECK-THUMBv6-NEXT:    lsls r2, r2, #8
+; CHECK-THUMBv6-NEXT:    adds r1, r2, r1
+; CHECK-THUMBv6-NEXT:    rev r1, r1
+; CHECK-THUMBv6-NEXT:    lsrs r1, r1, #16
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv6-NEXT:    ldrh r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev16 r0, r0
+; CHECK-THUMBv6-NEXT:    adds r0, r1, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_bswap_i16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrh r1, [r0, #2]
+; CHECK-THUMBv7-NEXT:    movw r2, #65535
+; CHECK-THUMBv7-NEXT:    ldrh r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r1, r1
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bics r1, r2
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsr #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i16*
@@ -507,6 +681,24 @@ define i32 @load_i32_by_sext_i16(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_sext_i16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #2]
+; CHECK-THUMBv6-NEXT:    ldrb r2, [r0, #3]
+; CHECK-THUMBv6-NEXT:    lsls r2, r2, #8
+; CHECK-THUMBv6-NEXT:    adds r1, r2, r1
+; CHECK-THUMBv6-NEXT:    ldrh r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_sext_i16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrh r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrh r0, [r0, #2]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
   %tmp = bitcast i32* %arg to i16*
   %tmp1 = load i16, i16* %tmp, align 4
   %tmp2 = sext i16 %tmp1 to i32
@@ -541,6 +733,18 @@ define i32 @load_i32_by_i8_base_offset_index(i8* %arg, i32 %i) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #12]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_base_offset_index:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, #12]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    add r0, r1
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0, #12]
+; CHECK-THUMBv7-NEXT:    bx lr
   %tmp = add nuw nsw i32 %i, 3
   %tmp2 = add nuw nsw i32 %i, 2
   %tmp3 = add nuw nsw i32 %i, 1
@@ -593,6 +797,19 @@ define i32 @load_i32_by_i8_base_offset_index_2(i8* %arg, i32 %i) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #13]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_base_offset_index_2:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    adds r0, r1, r0
+; CHECK-THUMBv6-NEXT:    movs r1, #13
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index_2:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    add r0, r1
+; CHECK-THUMBv7-NEXT:    ldr.w r0, [r0, #13]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = add nuw nsw i32 %i, 4
   %tmp2 = add nuw nsw i32 %i, 3
@@ -640,6 +857,21 @@ define i32 @zext_load_i32_by_i8(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldrb r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #8
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -671,6 +903,23 @@ define i32 @zext_load_i32_by_i8_shl_8(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r0, r0, #16
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_shl_8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #8
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -703,6 +952,23 @@ define i32 @zext_load_i32_by_i8_shl_16(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r0, r0, #24
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #16
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_shl_16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -733,6 +999,21 @@ define i32 @zext_load_i32_by_i8_bswap(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldrb r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #1]
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #8
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1
@@ -764,6 +1045,23 @@ define i32 @zext_load_i32_by_i8_bswap_shl_8(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r1, r1, #16
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap_shl_8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #8
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1
@@ -796,6 +1094,23 @@ define i32 @zext_load_i32_by_i8_bswap_shl_16(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r1, r1, #24
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #16
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap_shl_16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r1, r1, #24
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1
@@ -830,6 +1145,21 @@ define i16 @load_i16_from_nonzero_offset(i8* %p) {
 ; CHECK-ARMv6-NEXT:    ldrb r0, [r0, #2]
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i16_from_nonzero_offset:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #2]
+; CHECK-THUMBv6-NEXT:    ldrh r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #8
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i16_from_nonzero_offset:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrh r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #2]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %p1.i16 = bitcast i8* %p to i16*
   %p2.i8 = getelementptr i8, i8* %p, i64 2
diff --git a/llvm/test/CodeGen/ARM/load-combine.ll b/llvm/test/CodeGen/ARM/load-combine.ll
index 03f4771c5a7..d173a098b9b 100644
--- a/llvm/test/CodeGen/ARM/load-combine.ll
+++ b/llvm/test/CodeGen/ARM/load-combine.ll
@@ -1,6 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=arm-unknown | FileCheck %s
 ; RUN: llc < %s -mtriple=armv6-unknown | FileCheck %s --check-prefix=CHECK-ARMv6
+; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv6
+; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv7
 
 ; i8* p; // p is 1 byte aligned
 ; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24)
@@ -26,6 +28,25 @@ define i32 @load_i32_by_i8_unaligned(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    orr r1, r1, r3, lsl #16
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #24
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_unaligned:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    ldrb r2, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r2, r2, #8
+; CHECK-THUMBv6-NEXT:    adds r1, r2, r1
+; CHECK-THUMBv6-NEXT:    ldrb r2, [r0, #2]
+; CHECK-THUMBv6-NEXT:    lsls r2, r2, #16
+; CHECK-THUMBv6-NEXT:    adds r1, r1, r2
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #3]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv6-NEXT:    adds r0, r1, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_unaligned:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -61,6 +82,16 @@ define i32 @load_i32_by_i8_aligned(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_aligned:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_aligned:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -105,6 +136,18 @@ define i32 @load_i32_by_i8_bswap(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 4
@@ -141,6 +184,18 @@ define i64 @load_i64_by_i8(i64* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldrd r0, r1, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i64_by_i8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r2, [r0]
+; CHECK-THUMBv6-NEXT:    ldr r1, [r0, #4]
+; CHECK-THUMBv6-NEXT:    mov r0, r2
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i64_by_i8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrd r0, r1, [r0]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i64* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 8
@@ -212,6 +267,21 @@ define i64 @load_i64_by_i8_bswap(i64* %arg) {
 ; CHECK-ARMv6-NEXT:    rev r0, r3
 ; CHECK-ARMv6-NEXT:    rev r1, r2
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i64_by_i8_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r1, [r0]
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, #4]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    rev r1, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i64_by_i8_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrd r1, r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    rev r1, r1
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i64* %arg to i8*
   %tmp1 = load i8, i8* %tmp, align 8
@@ -266,6 +336,17 @@ define i32 @load_i32_by_i8_nonzero_offset(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_nonzero_offset:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    movs r1, #1
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr.w r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -302,6 +383,17 @@ define i32 @load_i32_by_i8_neg_offset(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #-4]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_neg_offset:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    subs r0, r0, #4
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0, #-4]
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -346,6 +438,19 @@ define i32 @load_i32_by_i8_nonzero_offset_bswap(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    movs r1, #1
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr.w r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -390,6 +495,19 @@ define i32 @load_i32_by_i8_neg_offset_bswap(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #-4]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_neg_offset_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    subs r0, r0, #4
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0, #-4]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i8*
@@ -436,6 +554,18 @@ define i32 @load_i32_by_bswap_i16(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    rev r0, r0
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_bswap_i16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    rev r0, r0
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_bswap_i16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    rev r0, r0
+; CHECK-THUMBv7-NEXT:    bx lr
 
 
   %tmp = bitcast i32* %arg to i16*
@@ -463,6 +593,16 @@ define i32 @load_i32_by_sext_i16(i32* %arg) {
 ; CHECK-ARMv6:       @ %bb.0:
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_sext_i16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_sext_i16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0]
+; CHECK-THUMBv7-NEXT:    bx lr
   %tmp = bitcast i32* %arg to i16*
   %tmp1 = load i16, i16* %tmp, align 4
   %tmp2 = zext i16 %tmp1 to i32
@@ -489,6 +629,18 @@ define i32 @load_i32_by_i8_base_offset_index(i8* %arg, i32 %i) {
 ; CHECK-ARMv6-NEXT:    add r0, r0, r1
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #12]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_base_offset_index:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, #12]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    add r0, r1
+; CHECK-THUMBv7-NEXT:    ldr r0, [r0, #12]
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = add nuw nsw i32 %i, 3
   %tmp2 = add nuw nsw i32 %i, 2
@@ -534,6 +686,19 @@ define i32 @load_i32_by_i8_base_offset_index_2(i8* %arg, i32 %i) {
 ; CHECK-ARMv6-NEXT:    add r0, r1, r0
 ; CHECK-ARMv6-NEXT:    ldr r0, [r0, #13]
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: load_i32_by_i8_base_offset_index_2:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    adds r0, r1, r0
+; CHECK-THUMBv6-NEXT:    movs r1, #13
+; CHECK-THUMBv6-NEXT:    ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index_2:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    add r0, r1
+; CHECK-THUMBv7-NEXT:    ldr.w r0, [r0, #13]
+; CHECK-THUMBv7-NEXT:    bx lr
   %tmp = add nuw nsw i32 %i, 4
   %tmp2 = add nuw nsw i32 %i, 3
   %tmp3 = add nuw nsw i32 %i, 2
@@ -580,6 +745,21 @@ define i32 @zext_load_i32_by_i8(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldrb r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #8
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -611,6 +791,23 @@ define i32 @zext_load_i32_by_i8_shl_8(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r0, r0, #16
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_shl_8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #8
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -643,6 +840,23 @@ define i32 @zext_load_i32_by_i8_shl_16(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r0, r0, #24
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #16
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_shl_16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
@@ -673,6 +887,21 @@ define i32 @zext_load_i32_by_i8_bswap(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    ldrb r0, [r0, #1]
 ; CHECK-ARMv6-NEXT:    orr r0, r0, r1, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #1]
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #8
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1
@@ -704,6 +933,23 @@ define i32 @zext_load_i32_by_i8_bswap_shl_8(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r1, r1, #16
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #8
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap_shl_8:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #8
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #16
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_8:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsl #8
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1
@@ -736,6 +982,23 @@ define i32 @zext_load_i32_by_i8_bswap_shl_16(i32* %arg) {
 ; CHECK-ARMv6-NEXT:    lsl r1, r1, #24
 ; CHECK-ARMv6-NEXT:    orr r0, r1, r0, lsl #16
 ; CHECK-ARMv6-NEXT:    bx lr
+;
+; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap_shl_16:
+; CHECK-THUMBv6:       @ %bb.0:
+; CHECK-THUMBv6-NEXT:    ldrb r1, [r0, #1]
+; CHECK-THUMBv6-NEXT:    lsls r1, r1, #16
+; CHECK-THUMBv6-NEXT:    ldrb r0, [r0]
+; CHECK-THUMBv6-NEXT:    lsls r0, r0, #24
+; CHECK-THUMBv6-NEXT:    adds r0, r0, r1
+; CHECK-THUMBv6-NEXT:    bx lr
+;
+; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_16:
+; CHECK-THUMBv7:       @ %bb.0:
+; CHECK-THUMBv7-NEXT:    ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT:    ldrb r0, [r0, #1]
+; CHECK-THUMBv7-NEXT:    lsls r1, r1, #24
+; CHECK-THUMBv7-NEXT:    orr.w r0, r1, r0, lsl #16
+; CHECK-THUMBv7-NEXT:    bx lr
 
   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 1