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| author | Guozhi Wei <carrot@google.com> | 2018-04-07 23:36:10 +0000 |
|---|---|---|
| committer | Guozhi Wei <carrot@google.com> | 2018-04-07 23:36:10 +0000 |
| commit | 0eb86c8efc0a3a21b4bdcad64c58d4a3e2fa7c35 (patch) | |
| tree | 62044ce308506307a194ffa1151cf4f77ad01300 /llvm/test/CodeGen/ARM | |
| parent | e46ac5fb9dcbfd805bf1181dc6babcae0a5c9210 (diff) | |
| download | bcm5719-llvm-0eb86c8efc0a3a21b4bdcad64c58d4a3e2fa7c35.tar.gz bcm5719-llvm-0eb86c8efc0a3a21b4bdcad64c58d4a3e2fa7c35.zip | |
[DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))
In our real world application, we found the following optimization is missed in DAGCombiner
(zext (and/or/xor (shl/shr (load x), cst), cst)) -> (and/or/xor (shl/shr (zextload x), (zext cst)), (zext cst))
If the user of original zext is an add, it may enable further lea optimization on x86.
This patch add a new function CombineZExtLogicopShiftLoad to do this optimization.
Differential Revision: https://reviews.llvm.org/D44402
llvm-svn: 329516
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/zext-logic-shift-load.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/zext-logic-shift-load.ll b/llvm/test/CodeGen/ARM/zext-logic-shift-load.ll new file mode 100644 index 00000000000..ab6bc7d572a --- /dev/null +++ b/llvm/test/CodeGen/ARM/zext-logic-shift-load.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=armv7-linux-gnu < %s -o - | FileCheck %s + +define void @test1(i8* %p, i16* %q) { +; CHECK: ldrb +; CHECK-NEXT: mov +; CHECK-NEXT: and +; CHECK-NEXT: strh +; CHECK-NEXT: bx + + %1 = load i8, i8* %p + %2 = shl i8 %1, 2 + %3 = and i8 %2, 12 + %4 = zext i8 %3 to i16 + store i16 %4, i16* %q + ret void +} + |
