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| author | Adam Nemet <anemet@apple.com> | 2015-07-17 18:14:19 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2015-07-17 18:14:19 +0000 |
| commit | 5a6d5bc17b385293e3337b9f2082151594f972f9 (patch) | |
| tree | 68b84e4d2228fbee8e8578f0092305e9cd9e78c4 /llvm/test/CodeGen/ARM/vector-load.ll | |
| parent | 4cb0ba311a91e7374290d4faddbc7d018b130095 (diff) | |
| download | bcm5719-llvm-5a6d5bc17b385293e3337b9f2082151594f972f9.tar.gz bcm5719-llvm-5a6d5bc17b385293e3337b9f2082151594f972f9.zip | |
Revert "ARM: Enable MachineScheduler and disable PostRAScheduler for swift."
This reverts commit r242500.
It broke some internal tests and Matthias asked me to revert it while he
is investigating.
llvm-svn: 242553
Diffstat (limited to 'llvm/test/CodeGen/ARM/vector-load.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vector-load.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/vector-load.ll b/llvm/test/CodeGen/ARM/vector-load.ll index a638c2bdb9b..17f134f458a 100644 --- a/llvm/test/CodeGen/ARM/vector-load.ll +++ b/llvm/test/CodeGen/ARM/vector-load.ll @@ -238,12 +238,12 @@ define <4 x i32> @zextload_v8i8tov8i32(<4 x i8>** %ptr) { define <4 x i32> @zextload_v8i8tov8i32_fake_update(<4 x i8>** %ptr) { ;CHECK-LABEL: zextload_v8i8tov8i32_fake_update: -;CHECK: ldr r[[PTRREG:[0-9]+]], [r0] +;CHECK: ldr.w r[[PTRREG:[0-9]+]], [r0] ;CHECK: vld1.32 {{{d[0-9]+}}[0]}, [r[[PTRREG]]:32] ;CHECK: add.w r[[INCREG:[0-9]+]], r[[PTRREG]], #16 +;CHECK: str.w r[[INCREG]], [r0] ;CHECK: vmovl.u8 {{q[0-9]+}}, {{d[0-9]+}} ;CHECK: vmovl.u16 {{q[0-9]+}}, {{d[0-9]+}} -;CHECK: str r[[INCREG]], [r0] %A = load <4 x i8>*, <4 x i8>** %ptr %lA = load <4 x i8>, <4 x i8>* %A, align 4 %inc = getelementptr <4 x i8>, <4 x i8>* %A, i38 4 |
