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author | Evan Cheng <evan.cheng@apple.com> | 2010-10-28 06:47:08 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-28 06:47:08 +0000 |
commit | ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8 (patch) | |
tree | 170667846f8da80d9444d3b1618f40bcdb257793 /llvm/test/CodeGen/ARM/shifter_operand.ll | |
parent | 0165e255640f63d467f58993ce922cfcad847866 (diff) | |
download | bcm5719-llvm-ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8.tar.gz bcm5719-llvm-ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8.zip |
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
llvm-svn: 117531
Diffstat (limited to 'llvm/test/CodeGen/ARM/shifter_operand.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/shifter_operand.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll index 897fb1af01c..01e3a922f65 100644 --- a/llvm/test/CodeGen/ARM/shifter_operand.ll +++ b/llvm/test/CodeGen/ARM/shifter_operand.ll @@ -36,8 +36,8 @@ entry: ; lsl #2 is free ; A9: test3: -; A9: ldr r1, [r1, r2, lsl #2] ; A9: ldr r0, [r0, r2, lsl #2] +; A9: ldr r1, [r1, r2, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 %tmp3 = inttoptr i32 %tmp2 to i32* |